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b=B2pNwg/hwD4GFU+j3nK1XWEUYARxusswHne4K6Z5OpMVZCZ5ULburdPwHrZg5I4iu U/y9G2YsiGlibZSfkHi7l9Xc1A1byzgoT5FVOk+X4RFIoKyf/9F5r8tzdINa6Ps8CK NPuSjycgX6VTiF+iVSS1slG1ZPMnyNtYdJWJVNkY44ow8evHMgw76zaMNBUTb1gBOc nj3GHa4KAPMpDuvEycIrwcKhHJVzFpCFK7p7pG+gbOJbi5QsNN4n2gti59vuYtfqHK aaq8X28NwfZ8l26T0x1HIRhf7nZrUbo6m75mqZ305iGTMgwp0/oNpia09G3VtqBot9 UR6a8YKfras6w== Date: Thu, 18 Apr 2024 15:19:32 +0100 From: Will Deacon To: Sean Christopherson Cc: Marc Zyngier , Paolo Bonzini , linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Oliver Upton , Tianrui Zhao , Bibo Mao , Thomas Bogendoerfer , Nicholas Piggin , Anup Patel , Atish Patra , Andrew Morton , David Hildenbrand , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, loongarch@lists.linux.dev, linux-mips@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, kvm-riscv@lists.infradead.org, linux-mm@kvack.org, linux-trace-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Subject: Re: [PATCH 1/4] KVM: delete .change_pte MMU notifier callback Message-ID: <20240418141932.GA1855@willie-the-truck> References: <20240405115815.3226315-1-pbonzini@redhat.com> <20240405115815.3226315-2-pbonzini@redhat.com> <20240412104408.GA27645@willie-the-truck> <86jzl2sovz.wl-maz@kernel.org> <86h6g5si0m.wl-maz@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-Rspam-User: X-Rspamd-Server: rspam11 X-Rspamd-Queue-Id: 64863C001C X-Stat-Signature: yrsrspc5bdhoqwji7oyxpbgqocwyrf19 X-HE-Tag: 1713449981-720738 X-HE-Meta: U2FsdGVkX18yWvgivOPJ3Up81NPlN2qftqzy7R0RKsydKlDNJJXBf4u8g97vOqQoKDM/24KJMTRpkExSET9pRqhEVlPJFjntPldYFVSfPAj9RkI1Aad50iKA9Op1OHLAWRHtrSbE3qq97/dzcgfoJsxmpEUKMDqTn/DSMdVA368L83RxwCzwnoNMWRKXyOr+3uQ/H5MPBuEexHBqFl7v9nb6h77EafR2MaMVtpRam+kg3mieJMrptTqdSMaFA1uRWTav665JsBOIS1OYyZHEnGN4hrmI+NBYT2q6pdnw2Ricd43CEWGWHPgy5zH5IDBIcoxuPVUG2wHGuXG2H2Peh/WpZzc+O7hpuwmvR7ALV6j+rrfqdam9M3RKQOKPpn7ewO+JqReVRkJPpNtGAPRjdQ9MoP8gA3Emtxs/BOfSGKUosSpkiXTRM/7pggJAsNLPnR7eDAuibMlSk4tOdjNZMHWIPtzY+uYu98CRRLRJAfoL0vqsnkU6/1X94u9Hf05V0Nfv4LdwyAHM8jk7hFI2nhfSvmcOwuKyj8759wyX8kia8o+rrILsuyN+yKSmaho+9rDGIlkKO4dFdjo/O1XeK1L86OwvNpDRZ7IIE+bg0hhuA7vEFZat6a+gL55nEnQIRXULLy3xZOTbxSls63oMvKimvFBSPYUyF4rYLIT3iSgkwEY7cduaW764oLGmsV2AKdP123FDL9hNsWJRrhyR6fxsZpH8O6ODGkkN5DQWngBEMtMmjV6NxcXp0k3eITvQhMzK2NMuSzv7tzauV8IN21DXikV2bmmFRdyoDneR3pe7HMnygikWt5x4Lz/VMy2M8WSmRALfLmdJmrB0OnjNcZZDDrEykrE/D+Wt0ftg7AuH5QdMvDB289MQwotuwuy6GdhPXOA2J1E4tvQFjnhzDdEGdqgUlod5iYQHHJj9OHbycNowlVcMmoH7Czou247A6IhgrOHSdj1Bi+x7F4E abV2kWJQ 5ia/Ldn7nzIwZO9N39oq8ISHnzpZVdu9j1y5TeqDZnx+F7/uf3DtOPY/JslguS/nCqZ/CpaOrf36jgA4X+5gvJ7eVlmpWMM5iStX0OvD4O7du5aghPaRMrSeuSBasoGn3Xu8ZIo00z9Fvr7taMBgVRGvtM5ZnxEaCLgnvQ0tgAaM2sk1CaUS+zmwFa9xUp7AgZ3zMWg8nSljwclXE9AZe0gwQf5xkyetkUrAuOm65LYm122lEVacuT7mSTsuMvIIpcnNQGOGFSKddI6+j7EEiwxozKEhQqTdyx2TCp/Hr5Z4S0EEBrAJEzDHu3Ap4r85v+/cv X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On Mon, Apr 15, 2024 at 10:03:51AM -0700, Sean Christopherson wrote: > On Sat, Apr 13, 2024, Marc Zyngier wrote: > > On Fri, 12 Apr 2024 15:54:22 +0100, Sean Christopherson wrote: > > > > > > On Fri, Apr 12, 2024, Marc Zyngier wrote: > > > > On Fri, 12 Apr 2024 11:44:09 +0100, Will Deacon wrote: > > > > > On Fri, Apr 05, 2024 at 07:58:12AM -0400, Paolo Bonzini wrote: > > > > > Also, if you're in the business of hacking the MMU notifier code, it > > > > > would be really great to change the .clear_flush_young() callback so > > > > > that the architecture could handle the TLB invalidation. At the moment, > > > > > the core KVM code invalidates the whole VMID courtesy of 'flush_on_ret' > > > > > being set by kvm_handle_hva_range(), whereas we could do a much > > > > > lighter-weight and targetted TLBI in the architecture page-table code > > > > > when we actually update the ptes for small ranges. > > > > > > > > Indeed, and I was looking at this earlier this week as it has a pretty > > > > devastating effect with NV (it blows the shadow S2 for that VMID, with > > > > costly consequences). > > > > > > > > In general, it feels like the TLB invalidation should stay with the > > > > code that deals with the page tables, as it has a pretty good idea of > > > > what needs to be invalidated and how -- specially on architectures > > > > that have a HW-broadcast facility like arm64. > > > > > > Would this be roughly on par with an in-line flush on arm64? The simpler, more > > > straightforward solution would be to let architectures override flush_on_ret, > > > but I would prefer something like the below as x86 can also utilize a range-based > > > flush when running as a nested hypervisor. > > ... > > > I think this works for us on HW that has range invalidation, which > > would already be a positive move. > > > > For the lesser HW that isn't range capable, it also gives the > > opportunity to perform the iteration ourselves or go for the nuclear > > option if the range is larger than some arbitrary constant (though > > this is additional work). > > > > But this still considers the whole range as being affected by > > range->handler(). It'd be interesting to try and see whether more > > precise tracking is (or isn't) generally beneficial. > > I assume the idea would be to let arch code do single-page invalidations of > stage-2 entries for each gfn? Right, as it's the only code which knows which ptes actually ended up being aged. > Unless I'm having a brain fart, x86 can't make use of that functionality. Intel > doesn't provide any way to do targeted invalidation of stage-2 mappings. AMD > provides an instruction to do broadcast invalidations, but it takes a virtual > address, i.e. a stage-1 address. I can't tell if it's a host virtual address or > a guest virtual address, but it's a moot point because KVM doen't have the guest > virtual address, and if it's a host virtual address, there would need to be valid > mappings in the host page tables for it to work, which KVM can't guarantee. Ah, so it sounds like it would need to be an arch opt-in then. Will