From: <shiju.jose@huawei.com>
To: <linux-cxl@vger.kernel.org>
Cc: <jonathan.cameron@huawei.com>, <Vilas.Sridharan@amd.com>,
<leo.duran@amd.com>, <Yazen.Ghannam@amd.com>,
<rientjes@google.com>, <jiaqiyan@google.com>,
<tony.luck@intel.com>, <Jon.Grimm@amd.com>,
<dave.hansen@linux.intel.com>, <linux-acpi@vger.kernel.org>,
<linux-mm@kvack.org>, <linux-kernel@vger.kernel.org>,
<rafael@kernel.org>, <lenb@kernel.org>, <naoya.horiguchi@nec.com>,
<james.morse@arm.com>, <david@redhat.com>,
<jthoughton@google.com>, <somasundaram.a@hpe.com>,
<erdemaktas@google.com>, <"pgonda@pgonda"@google.com>,
<duenwen@google.com>, <mike.malvestuto@intel.com>,
<gthelen@google.com>, <tanxiaofei@huawei.com>,
<prime.zeng@hisilicon.com>, <kangkang.shen@futurewei.com>,
<wanghuiqiang@huawei.com>, <linuxarm@huawei.com>,
<shiju.jose@huawei.com>
Subject: [RFC PATCH 4/6] memory: scrub: Add scrub control attributes for the DDR5 ECS
Date: Tue, 14 Nov 2023 20:56:45 +0800 [thread overview]
Message-ID: <20231114125648.1146-5-shiju.jose@huawei.com> (raw)
In-Reply-To: <20231114125648.1146-1-shiju.jose@huawei.com>
From: Shiju Jose <shiju.jose@huawei.com>
Add scrub control attributes for the DDR5 ECS feature.
The Error Check Scrub (ECS) is a feature defined in JEDEC DDR5 SDRAM
Specification (JESD79-5) and allows the DRAM to internally read, correct
single-bit errors, and write back corrected data bits to the DRAM array
while providing transparency to error counts. The ECS control feature
allows the request to configure ECS input configurations during system
boot or at run-time.
The ECS control allows the requester to change the ECS threshold count
provided that the request is within the definition specified in DDR5 mode
registers, change mode between codeword mode and row count mode, and reset
the ECS counter.
Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
---
drivers/memory/scrub/memory-scrub.c | 14 +++++++++++++-
include/memory/memory-scrub.h | 11 +++++++++++
2 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/memory/scrub/memory-scrub.c b/drivers/memory/scrub/memory-scrub.c
index ff5b4a52d2da..5f7b1fd73fb1 100755
--- a/drivers/memory/scrub/memory-scrub.c
+++ b/drivers/memory/scrub/memory-scrub.c
@@ -211,7 +211,8 @@ static bool is_hex_attr(u32 attr)
static bool is_string_attr(u32 attr)
{
- return attr == scrub_speed_available;
+ return attr == scrub_speed_available ||
+ attr == scrub_threshold_available;
}
static struct attribute *scrub_genattr(const void *drvdata,
@@ -266,11 +267,22 @@ static struct attribute *scrub_genattr(const void *drvdata,
}
static const char * const scrub_common_attrs[] = {
+ /* scrub attributes - common */
[scrub_addr_base] = "addr_base",
[scrub_addr_size] = "addr_size",
[scrub_enable] = "enable",
[scrub_speed] = "speed",
[scrub_speed_available] = "speed_available",
+ /* scrub attributes - DDR5 ECS/common */
+ [scrub_ecs_log_entry_type] = "ecs_log_entry_type",
+ [scrub_ecs_log_entry_type_per_dram] = "ecs_log_entry_type_per_dram",
+ [scrub_ecs_log_entry_type_per_memory_media] = "ecs_log_entry_type_per_memory_media",
+ [scrub_mode] = "mode",
+ [scrub_mode_counts_rows] = "mode_counts_rows",
+ [scrub_mode_counts_codewords] = "mode_counts_codewords",
+ [scrub_reset_counter] = "reset_counter",
+ [scrub_threshold] = "threshold",
+ [scrub_threshold_available] = "threshold_available",
};
static struct attribute **
diff --git a/include/memory/memory-scrub.h b/include/memory/memory-scrub.h
index 8e999c9daaed..2e223e29a5bc 100755
--- a/include/memory/memory-scrub.h
+++ b/include/memory/memory-scrub.h
@@ -17,11 +17,22 @@ enum scrub_types {
};
enum scrub_attributes {
+ /* scrub attributes - common */
scrub_addr_base,
scrub_addr_size,
scrub_enable,
scrub_speed,
scrub_speed_available,
+ /* scrub attributes - DDR5 ECS/common */
+ scrub_ecs_log_entry_type,
+ scrub_ecs_log_entry_type_per_dram,
+ scrub_ecs_log_entry_type_per_memory_media,
+ scrub_mode,
+ scrub_mode_counts_rows,
+ scrub_mode_counts_codewords,
+ scrub_reset_counter,
+ scrub_threshold,
+ scrub_threshold_available,
max_attrs,
};
--
2.34.1
next prev parent reply other threads:[~2023-11-14 12:57 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-14 12:56 [RFC PATCH 0/6] cxl: Add support for CXL feature commands, CXL device patrol scrub control and DDR5 ECS control features shiju.jose
2023-11-14 12:56 ` [RFC PATCH 1/6] cxl/mbox: Add GET_SUPPORTED_FEATURES, GET_FEATURE and SET_FEATURE mailbox commands shiju.jose
2023-11-15 18:20 ` Dave Jiang
2023-11-16 9:25 ` Shiju Jose
2023-11-14 12:56 ` [RFC PATCH 2/6] cxl/memscrub: Add CXL device patrol scrub control feature shiju.jose
2023-11-15 21:24 ` Dave Jiang
2023-11-16 9:50 ` Shiju Jose
2023-11-14 12:56 ` [RFC PATCH 3/6] memory: scrub: Add function to show scrub attributes in decimal shiju.jose
2023-11-14 12:56 ` shiju.jose [this message]
2023-11-14 12:56 ` [RFC PATCH 5/6] cxl/memscrub: Add CXL device DDR5 ECS control feature shiju.jose
2023-11-16 17:52 ` Dave Jiang
2023-11-14 12:56 ` [RFC PATCH 6/6] cxl: scrub: sysfs: Add Documentation for CXL memory device scrub control attributes shiju.jose
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