[linux-next:master 13230/13643] arch/riscv/errata/andes/errata.c:29:23: error: storage size of 'ret' isn't known

[kernel test robot <lkp@intel.com>]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head:   a47fc304d2b678db1a5d760a7d644dac9b067752
commit: f2863f30d1b05e5ecf61c063609cb974954d47f8 [13230/13643] riscv: errata: Add Andes alternative ports
config: riscv-randconfig-001-20230831 (https://download.01.org/0day-ci/archive/20230831/202308311610.ec6bm2G8-lkp@intel.com/config)
compiler: riscv64-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20230831/202308311610.ec6bm2G8-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202308311610.ec6bm2G8-lkp@intel.com/

All error/warnings (new ones prefixed by >>):

   arch/riscv/errata/andes/errata.c: In function 'ax45mp_iocp_sw_workaround':
>> arch/riscv/errata/andes/errata.c:29:23: error: storage size of 'ret' isn't known
      29 |         struct sbiret ret;
         |                       ^~~
>> arch/riscv/errata/andes/errata.c:35:15: error: implicit declaration of function 'sbi_ecall' [-Werror=implicit-function-declaration]
      35 |         ret = sbi_ecall(ANDESTECH_SBI_EXT_ANDES, ANDES_SBI_EXT_IOCP_SW_WORKAROUND,
         |               ^~~~~~~~~
>> arch/riscv/errata/andes/errata.c:29:23: warning: unused variable 'ret' [-Wunused-variable]
      29 |         struct sbiret ret;
         |                       ^~~
   cc1: some warnings being treated as errors


vim +29 arch/riscv/errata/andes/errata.c

    26	
    27	static long ax45mp_iocp_sw_workaround(void)
    28	{
  > 29		struct sbiret ret;
    30	
    31		/*
    32		 * ANDES_SBI_EXT_IOCP_SW_WORKAROUND SBI EXT checks if the IOCP is missing and
    33		 * cache is controllable only then CMO will be applied to the platform.
    34		 */
  > 35		ret = sbi_ecall(ANDESTECH_SBI_EXT_ANDES, ANDES_SBI_EXT_IOCP_SW_WORKAROUND,
    36				0, 0, 0, 0, 0, 0);
    37	
    38		return ret.error ? 0 : ret.value;
    39	}
    40	

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