From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3680EE4993 for ; Tue, 22 Aug 2023 14:04:27 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 90D3B900011; Tue, 22 Aug 2023 10:04:27 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 8BCDC28001C; Tue, 22 Aug 2023 10:04:27 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 70F2B900015; Tue, 22 Aug 2023 10:04:27 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0017.hostedemail.com [216.40.44.17]) by kanga.kvack.org (Postfix) with ESMTP id 61C85900011 for ; Tue, 22 Aug 2023 10:04:27 -0400 (EDT) Received: from smtpin02.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay01.hostedemail.com (Postfix) with ESMTP id 447101C923B for ; Tue, 22 Aug 2023 14:04:27 +0000 (UTC) X-FDA: 81151910574.02.E56E40C Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by imf19.hostedemail.com (Postfix) with ESMTP id 511661A003A for ; Tue, 22 Aug 2023 14:04:25 +0000 (UTC) Authentication-Results: imf19.hostedemail.com; dkim=pass header.d=kernel.org header.s=k20201202 header.b=RCqk+m47; dmarc=pass (policy=none) header.from=kernel.org; spf=pass (imf19.hostedemail.com: domain of broonie@kernel.org designates 139.178.84.217 as permitted sender) smtp.mailfrom=broonie@kernel.org ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1692713065; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=qn2wictEWB8wzi6RrERix0h5HYhcy7w/c2/srM6xMb4=; b=Utob6H5/JC69H/rvXXaXYyXJGwbJCikmdC8eUw8pR8cM4sZI0Ae9DAYhK4Zy7Y3UwnRoFZ hjzp10a3GmnKYx1soemPC6LllWcGuT459YF72F9vmk3/n8R485JSej8+Eit2dM5ajbd7lP UyPcSBAdMe52RCK6ljWIezkZS05iyBs= ARC-Authentication-Results: i=1; imf19.hostedemail.com; dkim=pass header.d=kernel.org header.s=k20201202 header.b=RCqk+m47; dmarc=pass (policy=none) header.from=kernel.org; spf=pass (imf19.hostedemail.com: domain of broonie@kernel.org designates 139.178.84.217 as permitted sender) smtp.mailfrom=broonie@kernel.org ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1692713065; a=rsa-sha256; cv=none; b=zHjWl6f1YSQoBeMQyMwOULT0YhvGzJ1aMBGcamxucmxER04ILQkpHwRbHe2tFbe011m3fg 8jVnXUeiese8/OJGkMECuxVt2uNXZ9yKUpGKwCsWqTzgkO6sYzfPYjJoCu5Z3G6fLbDyvQ Im1FNJOLYHjiV9qVYky/57vgJqxlsX0= Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 7BF5565796; Tue, 22 Aug 2023 14:04:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id F0922C433CA; Tue, 22 Aug 2023 14:04:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692713063; bh=tjbWwPwmImMptyDPc55s3c7Oj7q65gF9QqqfPkrYo0c=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=RCqk+m47/b5oHaZ/1B7AckLPjxeFflR5uvj4P08XSiPQe8kqjItk7kcv9/mTaexbd oG1uUYZzlINkKJ1EtUN7rMgHVY3ELd4gwPlGZQh3cEchNr8uWF+NyBnkq+YTweMKtI lVZYsN/CNP6k36YydVJLgNv+kUGd+gHse4l/ueEAaKlI7oxEHR1yxzpDs1Ll65V8yh Xu0U7Lo01W56XviOnbZP3QB4fMwXf0mdA26Cu/OLS2mi7VWuo5BhrA+7CBoW4yPUZ7 PFwrQrlLxiDYoA5hbQyoDK2PIJy8ZdCbGj9P2NrsrWdQaXr92VbjyPCg5FUauhrTYV SD3s8KT+NxQNw== From: Mark Brown Date: Tue, 22 Aug 2023 14:56:46 +0100 Subject: [PATCH v5 13/37] KVM: arm64: Manage GCS registers for guests MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20230822-arm64-gcs-v5-13-9ef181dd6324@kernel.org> References: <20230822-arm64-gcs-v5-0-9ef181dd6324@kernel.org> In-Reply-To: <20230822-arm64-gcs-v5-0-9ef181dd6324@kernel.org> To: Catalin Marinas , Will Deacon , Jonathan Corbet , Andrew Morton , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Arnd Bergmann , Oleg Nesterov , Eric Biederman , Kees Cook , Shuah Khan , "Rick P. Edgecombe" , Deepak Gupta , Ard Biesheuvel , Szabolcs Nagy Cc: "H.J. Lu" , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Brown X-Mailer: b4 0.13-dev-034f2 X-Developer-Signature: v=1; a=openpgp-sha256; l=5343; i=broonie@kernel.org; h=from:subject:message-id; bh=tjbWwPwmImMptyDPc55s3c7Oj7q65gF9QqqfPkrYo0c=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBk5L/6AHYHf7W6pdvodyEwO+Essp58pjlzx9Bd3yyH N/jhqSqJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCZOS/+gAKCRAk1otyXVSH0A47B/ sE/DNEBmtyZi27FTcHyMq2hTww99gioyBIL60ulWDm1glKQO1pj1+h/N6/IdTwgDYIA/J7zwO5B+rA EACRzKbOspBdaKgPGAu3qgY8KkuQ6xCnO7pgYVjlZc2Z7t+otM6GWnPd3fAv3rDXKRGoU7IwL6AL/M r+JUmgGZ3dHg4GOel9YrtAW9w/cpBagnUkKV7K8rYVunarnUGe6P4zK+gFkxTwv5IlfZHcojaEWUSf uTjwPwfL1yJl+zCdQgnRJejY85VLVYOD+Jjv1PNoJAJO8t6YZdmYvne4r88CHCniHExK/Bs5OMIRKr /GrENFHK36+hqocZgHmnv5qePOPi2I X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB X-Rspamd-Queue-Id: 511661A003A X-Rspam-User: X-Rspamd-Server: rspam04 X-Stat-Signature: isn5pexh3pruf9493471hyt9xeo75mbo X-HE-Tag: 1692713065-900372 X-HE-Meta: U2FsdGVkX183gmCUBU7NO/oLK0DHUKsNmQqoXyG/PG4NKuX0yn4D4nXZnXIXBvWd1y7pAA7n8B2/UqIZk4Tsfd0SHXEnzfGToQtmvdvbbpzJieQvImI537ivM3+rPpTdlTMgtq/COvcDuaUSbBbSE8po6GJOKzyUlZWnsUVQ6S2gTOBtLaIJxhm67pAMuMWMq2K8ugpjhWFznE02q+Wh5dtTmfEkSq9TokaOTvF6JCCjv/X7M4dGtRbk7GzoK4eV9EOIqzHwc73p8FgeYYxskF3N29D6LC1+Metts4S+B69DXCy4SKhbVewUDMKr7yCahHBUiZa0yLxUJb24UXJC5Wv3pTgOjvPjczzjULMm8a885qiPzgEMX+2TesxueLi2E1DOZjsvqGmVL9/S4hvWkJVn5QfrS7w3w70+xTf5WbkWJm3Yn4qLS6T1okfUgQ4ezZcAvQbdd84A96eK5RDhHnWfy6CCbEaJmyodyODzB7sRk6DgmUtlfMvj/4X9X46qlRKB0ahKzhAo44Jw4WbOmjloULaTQ72INml227wz89OnJX3PzuhVuEaR0gbIksw+axD+nCR/+/ZVj+xwOTj3wXj7cCadPIXtGIda/nXFbTy2eV+bdub6N1MyWSMycxZz+LB8VSbYQQTYRP3FINv7e4dot+p+yQ0vlleGeITzJkst8Osc4iAH4BrBiLQTHtbHvn7VuH3zGEtFikB3Cgs98YIFMeGiE70fdfJOT3P4EH95KJvzdFm6VLWQrOgl5f4qScgWS+6ZxvXzz95iJX+aFZMUePJNXCBn/fx2WGA5vdaiArFKejve39+9csC4D6GMs9SnvTEeEpa5aEdqJ5zhlunSf2y/5tQFDQeacJXBFiT81XSnKa6xVApqfhJDRV9Tq+qETg+iB1buj42LU3VLaKsfUkYLdqrQp7rpdYxBeIlTSbst1On9sZpWAzQaV3Y/7eJTF469TkAgsYQBJ9g EjAhmUXJ kpeDOzo27f7MFBs7GdyPpSUmqBi3cPIpi/rzYPaYTSxfMEEL3u0Vw5/klbynI2MzpfE+zH9jUUcra5/meMI6HqbnXLyGnew//alpVnSWRRRoPBvSxLBdVtrKy5d6zz3ioAdqJ13ksKlNWb7/CwooG/hLz8F57wX3LSnjABjF8VsXYcdGKddWHNa8uJHZq6uCnuPFh75zq3X1pTejmmstzOlMc/NgJhPXo33Xj3RhhKkRfHHWI6jpW7tMgnbh/786V76YeEz7wbjCPg3r+1IFtabJD/pY68OA3D2X66b85JSYxY1g+6k6POmbkj+WqKede0guI8vQVfDf8Aohy2WC+tr7XWh1fnhmNU3EMzRXQ3lNujc1F9MdRjotQyGexStNZ/MJJijtVh3FPPmXi9DiV9r5CiPQ+lgerlaoYNyQuNsuW6Uc= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: GCS introduces a number of system registers for EL1 and EL0, on systems with GCS we need to context switch them and expose them to VMMs to allow guests to use GCS. Traps are already disabled. Signed-off-by: Mark Brown --- arch/arm64/include/asm/kvm_host.h | 12 ++++++++++++ arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 17 +++++++++++++++++ arch/arm64/kvm/sys_regs.c | 22 ++++++++++++++++++++++ 3 files changed, 51 insertions(+) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index d3dd05bbfe23..a5bb00f58108 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -364,6 +364,12 @@ enum vcpu_sysreg { PIR_EL1, /* Permission Indirection Register 1 (EL1) */ PIRE0_EL1, /* Permission Indirection Register 0 (EL1) */ + /* Guarded Control Stack registers */ + GCSCRE0_EL1, /* Guarded Control Stack Control (EL0) */ + GCSCR_EL1, /* Guarded Control Stack Control (EL1) */ + GCSPR_EL0, /* Guarded Control Stack Pointer (EL0) */ + GCSPR_EL1, /* Guarded Control Stack Pointer (EL1) */ + /* 32bit specific registers. */ DACR32_EL2, /* Domain Access Control Register */ IFSR32_EL2, /* Instruction Fault Status Register */ @@ -1136,6 +1142,12 @@ bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu); #define kvm_vm_has_ran_once(kvm) \ (test_bit(KVM_ARCH_FLAG_HAS_RAN_ONCE, &(kvm)->arch.flags)) +static inline bool has_gcs(void) +{ + return IS_ENABLED(CONFIG_ARM64_GCS) && + cpus_have_final_cap(ARM64_HAS_GCS); +} + int kvm_trng_call(struct kvm_vcpu *vcpu); #ifdef CONFIG_KVM extern phys_addr_t hyp_mem_base; diff --git a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h index bb6b571ec627..ec34d4a90717 100644 --- a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h +++ b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h @@ -25,6 +25,8 @@ static inline void __sysreg_save_user_state(struct kvm_cpu_context *ctxt) { ctxt_sys_reg(ctxt, TPIDR_EL0) = read_sysreg(tpidr_el0); ctxt_sys_reg(ctxt, TPIDRRO_EL0) = read_sysreg(tpidrro_el0); + if (has_gcs()) + ctxt_sys_reg(ctxt, GCSPR_EL0) = read_sysreg_s(SYS_GCSPR_EL0); } static inline bool ctxt_has_mte(struct kvm_cpu_context *ctxt) @@ -62,6 +64,12 @@ static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt) ctxt_sys_reg(ctxt, PAR_EL1) = read_sysreg_par(); ctxt_sys_reg(ctxt, TPIDR_EL1) = read_sysreg(tpidr_el1); + if (has_gcs()) { + ctxt_sys_reg(ctxt, GCSPR_EL1) = read_sysreg_el1(SYS_GCSPR); + ctxt_sys_reg(ctxt, GCSCR_EL1) = read_sysreg_el1(SYS_GCSCR); + ctxt_sys_reg(ctxt, GCSCRE0_EL1) = read_sysreg_s(SYS_GCSCRE0_EL1); + } + if (ctxt_has_mte(ctxt)) { ctxt_sys_reg(ctxt, TFSR_EL1) = read_sysreg_el1(SYS_TFSR); ctxt_sys_reg(ctxt, TFSRE0_EL1) = read_sysreg_s(SYS_TFSRE0_EL1); @@ -95,6 +103,8 @@ static inline void __sysreg_restore_user_state(struct kvm_cpu_context *ctxt) { write_sysreg(ctxt_sys_reg(ctxt, TPIDR_EL0), tpidr_el0); write_sysreg(ctxt_sys_reg(ctxt, TPIDRRO_EL0), tpidrro_el0); + if (has_gcs()) + write_sysreg_s(ctxt_sys_reg(ctxt, GCSPR_EL0), SYS_GCSPR_EL0); } static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt) @@ -138,6 +148,13 @@ static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt) write_sysreg(ctxt_sys_reg(ctxt, PAR_EL1), par_el1); write_sysreg(ctxt_sys_reg(ctxt, TPIDR_EL1), tpidr_el1); + if (has_gcs()) { + write_sysreg_el1(ctxt_sys_reg(ctxt, GCSPR_EL1), SYS_GCSPR); + write_sysreg_el1(ctxt_sys_reg(ctxt, GCSCR_EL1), SYS_GCSCR); + write_sysreg_s(ctxt_sys_reg(ctxt, GCSCRE0_EL1), + SYS_GCSCRE0_EL1); + } + if (ctxt_has_mte(ctxt)) { write_sysreg_el1(ctxt_sys_reg(ctxt, TFSR_EL1), SYS_TFSR); write_sysreg_s(ctxt_sys_reg(ctxt, TFSRE0_EL1), SYS_TFSRE0_EL1); diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 2ca2973abe66..5b2f238d33be 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1768,6 +1768,23 @@ static unsigned int mte_visibility(const struct kvm_vcpu *vcpu, .visibility = mte_visibility, \ } +static unsigned int gcs_visibility(const struct kvm_vcpu *vcpu, + const struct sys_reg_desc *rd) +{ + if (has_gcs()) + return 0; + + return REG_HIDDEN; +} + +#define GCS_REG(name) { \ + SYS_DESC(SYS_##name), \ + .access = undef_access, \ + .reset = reset_unknown, \ + .reg = name, \ + .visibility = gcs_visibility, \ +} + static unsigned int el2_visibility(const struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd) { @@ -2080,6 +2097,10 @@ static const struct sys_reg_desc sys_reg_descs[] = { PTRAUTH_KEY(APDB), PTRAUTH_KEY(APGA), + GCS_REG(GCSCR_EL1), + GCS_REG(GCSPR_EL1), + GCS_REG(GCSCRE0_EL1), + { SYS_DESC(SYS_SPSR_EL1), access_spsr}, { SYS_DESC(SYS_ELR_EL1), access_elr}, @@ -2162,6 +2183,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { { SYS_DESC(SYS_SMIDR_EL1), undef_access }, { SYS_DESC(SYS_CSSELR_EL1), access_csselr, reset_unknown, CSSELR_EL1 }, { SYS_DESC(SYS_CTR_EL0), access_ctr }, + GCS_REG(GCSPR_EL0), { SYS_DESC(SYS_SVCR), undef_access }, { PMU_SYS_REG(PMCR_EL0), .access = access_pmcr, -- 2.30.2