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From: Enze Li <lienze@kylinos.cn>
To: chenhuacai@kernel.org, kernel@xen0n.name,
	loongarch@lists.linux.dev, glider@google.com, elver@google.com,
	akpm@linux-foundation.org, kasan-dev@googlegroups.com,
	linux-mm@kvack.org
Cc: zhangqing@loongson.cn, yangtiezhu@loongson.cn,
	dvyukov@google.com, Enze Li <lienze@kylinos.cn>
Subject: [PATCH 2/4 v3] LoongArch: mm: Add page table mapped mode support
Date: Tue,  1 Aug 2023 10:58:13 +0800	[thread overview]
Message-ID: <20230801025815.2436293-3-lienze@kylinos.cn> (raw)
In-Reply-To: <20230801025815.2436293-1-lienze@kylinos.cn>

According to LoongArch documentation online, there are two types of address
translation modes: direct mapped address translation mode (direct mapped mode)
and page table mapped address translation mode (page table mapped mode).

Currently, the upstream kernel only supports direct mapped mode.
This patch adds a function that determines whether page table mapped
mode should be used, and also adds the corresponding handler functions
for both modes.

For more details on the two modes, see [1].

[1] https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#virtual-address-space-and-address-translation-mode

Signed-off-by: Enze Li <lienze@kylinos.cn>
---
 arch/loongarch/include/asm/page.h    | 8 +++++++-
 arch/loongarch/include/asm/pgtable.h | 3 +++
 arch/loongarch/mm/pgtable.c          | 7 +++++++
 3 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/arch/loongarch/include/asm/page.h b/arch/loongarch/include/asm/page.h
index 26e8dccb6619..a256fd6cb7bb 100644
--- a/arch/loongarch/include/asm/page.h
+++ b/arch/loongarch/include/asm/page.h
@@ -84,7 +84,13 @@ typedef struct { unsigned long pgprot; } pgprot_t;
 #define sym_to_pfn(x)		__phys_to_pfn(__pa_symbol(x))
 
 #define virt_to_pfn(kaddr)	PFN_DOWN(PHYSADDR(kaddr))
-#define virt_to_page(kaddr)	pfn_to_page(virt_to_pfn(kaddr))
+
+#define virt_to_page(kaddr)						\
+({									\
+	((unsigned long)kaddr >= vm_map_base) ?				\
+	tlb_virt_to_page((unsigned long)kaddr) :			\
+	dmw_virt_to_page((unsigned long)kaddr);				\
+})
 
 extern int __virt_addr_valid(volatile void *kaddr);
 #define virt_addr_valid(kaddr)	__virt_addr_valid((volatile void *)(kaddr))
diff --git a/arch/loongarch/include/asm/pgtable.h b/arch/loongarch/include/asm/pgtable.h
index 38afeb7dd58b..716a7fcab15e 100644
--- a/arch/loongarch/include/asm/pgtable.h
+++ b/arch/loongarch/include/asm/pgtable.h
@@ -353,6 +353,9 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt
 #define PMD_T_LOG2	(__builtin_ffs(sizeof(pmd_t)) - 1)
 #define PTE_T_LOG2	(__builtin_ffs(sizeof(pte_t)) - 1)
 
+inline struct page *tlb_virt_to_page(unsigned long kaddr);
+#define dmw_virt_to_page(kaddr)	pfn_to_page(virt_to_pfn(kaddr))
+
 extern pgd_t swapper_pg_dir[];
 extern pgd_t invalid_pg_dir[];
 
diff --git a/arch/loongarch/mm/pgtable.c b/arch/loongarch/mm/pgtable.c
index 36a6dc0148ae..fea8fd2cf141 100644
--- a/arch/loongarch/mm/pgtable.c
+++ b/arch/loongarch/mm/pgtable.c
@@ -9,6 +9,13 @@
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
 
+
+inline struct page *tlb_virt_to_page(unsigned long kaddr)
+{
+	return pte_page(*virt_to_kpte(kaddr));
+}
+EXPORT_SYMBOL_GPL(tlb_virt_to_page);
+
 pgd_t *pgd_alloc(struct mm_struct *mm)
 {
 	pgd_t *ret, *init;
-- 
2.34.1



  parent reply	other threads:[~2023-08-01  2:58 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-01  2:58 [PATCH 0/4 v3] Add KFENCE support for LoongArch Enze Li
2023-08-01  2:58 ` [PATCH 1/4 v3] KFENCE: Defer the assignment of the local variable addr Enze Li
2023-08-01  2:58 ` Enze Li [this message]
2023-08-01  2:58 ` [PATCH 3/4 v3] LoongArch: Get stack without NMI when providing regs parameter Enze Li
2023-08-01  2:58 ` [PATCH 4/4 v3] LoongArch: Add KFENCE support Enze Li
2023-08-02 15:12 ` [PATCH 0/4 v3] Add KFENCE support for LoongArch Huacai Chen
2023-08-03  8:05   ` Enze Li

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