From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF61EC41513 for ; Mon, 31 Jul 2023 13:52:08 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 6D28F28004C; Mon, 31 Jul 2023 09:52:08 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 682A1280023; Mon, 31 Jul 2023 09:52:08 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 524A928004C; Mon, 31 Jul 2023 09:52:08 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0015.hostedemail.com [216.40.44.15]) by kanga.kvack.org (Postfix) with ESMTP id 41E7F280023 for ; Mon, 31 Jul 2023 09:52:08 -0400 (EDT) Received: from smtpin17.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay04.hostedemail.com (Postfix) with ESMTP id 1113E1A0B70 for ; Mon, 31 Jul 2023 13:52:08 +0000 (UTC) X-FDA: 81072045936.17.E14CF9B Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by imf10.hostedemail.com (Postfix) with ESMTP id E8D0BC001A for ; Mon, 31 Jul 2023 13:52:05 +0000 (UTC) Authentication-Results: imf10.hostedemail.com; dkim=pass header.d=kernel.org header.s=k20201202 header.b="Kxs//515"; dmarc=pass (policy=none) header.from=kernel.org; spf=pass (imf10.hostedemail.com: domain of broonie@kernel.org designates 139.178.84.217 as permitted sender) smtp.mailfrom=broonie@kernel.org ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1690811526; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=qn2wictEWB8wzi6RrERix0h5HYhcy7w/c2/srM6xMb4=; b=c52edZCnltEBG2m3Q7kcJu3b8oJXJIuGQsmNrRVd8rzY4aueWPpDKMuRKPdUVwoa3KNiBO LwdRstwiqN4RwealCBelgOsyVKR1qDtq7suaTY8uTMBFq45lPAVUuZ+z0rP0YJ05RUmqBx 3/XvPXwcBaG+fYQacsCmtBTt4leGSsc= ARC-Authentication-Results: i=1; imf10.hostedemail.com; dkim=pass header.d=kernel.org header.s=k20201202 header.b="Kxs//515"; dmarc=pass (policy=none) header.from=kernel.org; spf=pass (imf10.hostedemail.com: domain of broonie@kernel.org designates 139.178.84.217 as permitted sender) smtp.mailfrom=broonie@kernel.org ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1690811526; a=rsa-sha256; cv=none; b=BwHWqgErBRDTQmWgM1FiW9qO5brXAUkylsVZjUvXUqO/VmHPTidpSTnnagC95W0ZIRn8Se LYDokSVgcSXEoeHEI4WZSJSAz/i1WPJpR09U1FQp4+GDWbQt9WRVJbLNe3ZIeAQkUrqn+h D1LVEYDw9/+G5awluwcKk3YnBAE88+M= Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id EAA8E6115E; Mon, 31 Jul 2023 13:52:04 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B07DAC433CA; Mon, 31 Jul 2023 13:51:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1690811524; bh=tjbWwPwmImMptyDPc55s3c7Oj7q65gF9QqqfPkrYo0c=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Kxs//515TNksXPcGsUDIRCuO56pAW9cLWwkKUQPCsP2AIbz64i9hFYmwcVYGmZT3N r+YswiYCvJGdHkcVgkUkvsvrQlyyoDzUHhrc8X1wxCRVQHlFU5ziNi2fk6VEaZXaon c/Z1IU6fy1geftvZaD6Iafk1rPVWb35djvnKcnYSz4Iu8so4SScQnV3XIKmjTRNrz/ bSHli6ey4nTdadCEpnsARTltNzkla9WT/2UR3DkL6lfWy+HWB0y2wdGRV8hFgjnnAm pUJsjtctliPEAIkBe7P8WpdBcRGTZWsE89qcBUsjjdy15A6Lf5Gkt7PAC7bKO5+Rb8 6b3Yc6CdvhMHw== From: Mark Brown Date: Mon, 31 Jul 2023 14:43:21 +0100 Subject: [PATCH v3 12/36] KVM: arm64: Manage GCS registers for guests MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20230731-arm64-gcs-v3-12-cddf9f980d98@kernel.org> References: <20230731-arm64-gcs-v3-0-cddf9f980d98@kernel.org> In-Reply-To: <20230731-arm64-gcs-v3-0-cddf9f980d98@kernel.org> To: Catalin Marinas , Will Deacon , Jonathan Corbet , Andrew Morton , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Arnd Bergmann , Oleg Nesterov , Eric Biederman , Kees Cook , Shuah Khan , "Rick P. Edgecombe" , Deepak Gupta , Ard Biesheuvel , Szabolcs Nagy Cc: "H.J. Lu" , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Brown X-Mailer: b4 0.13-dev-099c9 X-Developer-Signature: v=1; a=openpgp-sha256; l=5343; i=broonie@kernel.org; h=from:subject:message-id; bh=tjbWwPwmImMptyDPc55s3c7Oj7q65gF9QqqfPkrYo0c=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBkx7wdjFQ/70pWXwHuzZQOS3hNAQ0GVgNF/YD1JvvG A7LHvI+JATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCZMe8HQAKCRAk1otyXVSH0ISkB/ 9nGwbEhPQagdr70ume7OfMMAEfa5PLORLXj5xM0+1YeUpDB6MbLGgcm17sgqexHf5BMVgkhYKBb6Dz FrT5GPossjEi5tmjucSgUqYTcdh2QlMr+YCgFLQbKo/mWkC5OZa+RZkKkyL99xZAuf6RUP6/8spHFO FLQ7wmY8dvb+sk5ofrVhZ/nqB3N3slPcY4Ffz4wDHDtfUUe7KiX9v2E523wbBvxpjoZOINpsbRlRl/ g5ppKJcD7UbVe03t9zbcci6dZ5MAKY/Fzf4SAXI37TBsYRCDfcnY9Qtpwuqyfd0U70I4OdA6pgGr8n 6981bnGJR5FGN71mBBtsMgpC9f36TC X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB X-Rspamd-Server: rspam09 X-Rspamd-Queue-Id: E8D0BC001A X-Stat-Signature: itrmn7g6wwmd9k4oiqkkxhe6uh8gxzrz X-Rspam-User: X-HE-Tag: 1690811525-759795 X-HE-Meta: U2FsdGVkX18Zjmavb/acPFzPtBM2peWyp5IMegJVl5ucf7Qxo3+xNlkNF7CKzWV1YS+9dHVnlwptpQZq1GK5YNkR3xD/ssFccAsNz65R8k6z6NjErOD4Sh9p1yCtKAVC8lhGKYNOjwNIJ25pZPhPqf+YSHIS7uf4wUUuukZO1Ej4dN43mWyaOf+ePMevHFuz5oZZNFyDcUOurQC4W8CDB5yod58o23NLq/PPtU9NowVqu9/GjZduEejZtrmpodFtFXpBfUiNYyw//a1JLG6L5pcAtgKXYV4Ch1fPMbBDaAH4/ioXoBAfl/bhJSlvgKySib9OXF2jRu3lx0woC0JjrbEr4J656IGOZ5ARQ9lThvTr3+qUiyQWsTXDOfxCH/Z2kps5KG9cFS6e39yQ0Q1NFy0U1hFbAYTtLvyagXfshrf6YZW/qLzHtmQPqHYwAFP4BT/9/407jHh7OPTOy+OgCFUQUI5v3ZNzulLLimW3b0EEhTVJyQY/OI0kcgX87mcFDMF+AX0DF+rIiqLavDZtwpRX9ZBGVILxmPfPVFuqjCrcIXMcAHJJwe5MH2BhMOySGc6o84D6jtlAG1y0xBxUdwYzKTSU7wdoU5X7X079jUaPJclyVKSr6m0lKKSraD8t7zag5rtT4XUtbLVZNAT49I3pliQv0JcRlsQkd1xqPopsbu5cIcLhgiKzP4EptWLkyasttrEOJCcUlN8DVrYH/rWMCWhwePKqeNdLt71dOqPynnzqSE70g1iu4W2yhCdnksumX/v/GYtDJ9myJ5IwZQKiS1rSBYjwgcJMxT7okETUGgWZdNvUAsLzCrNJK/4SZWXbOv/d3sg1xScjz+zd35OowPIFNo8G4e3qzTOgjAc3TF9yKG8rSSodvASrXLDdE6mqFy4TIyPJHrNl+dR4Tj0A14XMqJci0vweFs5IlMFyJulI2K8EoZY2i81k70jkF0ybLsz8mAhBygVsiD6 w6jOCLJL a1/s8ZB1QjvAWdfHwfSFi10U90FqWIvjyb8AwD6sRPQvLDIn9hD8MdEAt5hqEXYkzBHZqil49TIvlzLdoLOGM+sgcgU97FoVKkpvdycMinYIK4yF7NrFzxLhZA+xw8cINWrxmaK3ZDjK4A4VQvSqhoCzoNNj3/m8VfkC08hChBNsvY6wMsSr6VVgJYsg2Eg7xpFscCSR2if2m5Va3cc7ZyrL78xppmiHCH9noVyZ847jxHmIKc90wAXyurV1Gwv4ehrwgtpMnRTqc6k0ooaspg/EPANVJFce/JnMIwXhMMv5moJkKnaS8ZHoGOLpXmKrfDnKyCPPLSdtJgWWXYOcxddU+rtVhmn8SRG4DVr0Cfwf947LfCgQjjK6WPEv0PHo1rguU/8xL++/0fnNK2mWpHaItYowiv63db7Q1HyrPeA0Dflw= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: GCS introduces a number of system registers for EL1 and EL0, on systems with GCS we need to context switch them and expose them to VMMs to allow guests to use GCS. Traps are already disabled. Signed-off-by: Mark Brown --- arch/arm64/include/asm/kvm_host.h | 12 ++++++++++++ arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 17 +++++++++++++++++ arch/arm64/kvm/sys_regs.c | 22 ++++++++++++++++++++++ 3 files changed, 51 insertions(+) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index d3dd05bbfe23..a5bb00f58108 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -364,6 +364,12 @@ enum vcpu_sysreg { PIR_EL1, /* Permission Indirection Register 1 (EL1) */ PIRE0_EL1, /* Permission Indirection Register 0 (EL1) */ + /* Guarded Control Stack registers */ + GCSCRE0_EL1, /* Guarded Control Stack Control (EL0) */ + GCSCR_EL1, /* Guarded Control Stack Control (EL1) */ + GCSPR_EL0, /* Guarded Control Stack Pointer (EL0) */ + GCSPR_EL1, /* Guarded Control Stack Pointer (EL1) */ + /* 32bit specific registers. */ DACR32_EL2, /* Domain Access Control Register */ IFSR32_EL2, /* Instruction Fault Status Register */ @@ -1136,6 +1142,12 @@ bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu); #define kvm_vm_has_ran_once(kvm) \ (test_bit(KVM_ARCH_FLAG_HAS_RAN_ONCE, &(kvm)->arch.flags)) +static inline bool has_gcs(void) +{ + return IS_ENABLED(CONFIG_ARM64_GCS) && + cpus_have_final_cap(ARM64_HAS_GCS); +} + int kvm_trng_call(struct kvm_vcpu *vcpu); #ifdef CONFIG_KVM extern phys_addr_t hyp_mem_base; diff --git a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h index bb6b571ec627..ec34d4a90717 100644 --- a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h +++ b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h @@ -25,6 +25,8 @@ static inline void __sysreg_save_user_state(struct kvm_cpu_context *ctxt) { ctxt_sys_reg(ctxt, TPIDR_EL0) = read_sysreg(tpidr_el0); ctxt_sys_reg(ctxt, TPIDRRO_EL0) = read_sysreg(tpidrro_el0); + if (has_gcs()) + ctxt_sys_reg(ctxt, GCSPR_EL0) = read_sysreg_s(SYS_GCSPR_EL0); } static inline bool ctxt_has_mte(struct kvm_cpu_context *ctxt) @@ -62,6 +64,12 @@ static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt) ctxt_sys_reg(ctxt, PAR_EL1) = read_sysreg_par(); ctxt_sys_reg(ctxt, TPIDR_EL1) = read_sysreg(tpidr_el1); + if (has_gcs()) { + ctxt_sys_reg(ctxt, GCSPR_EL1) = read_sysreg_el1(SYS_GCSPR); + ctxt_sys_reg(ctxt, GCSCR_EL1) = read_sysreg_el1(SYS_GCSCR); + ctxt_sys_reg(ctxt, GCSCRE0_EL1) = read_sysreg_s(SYS_GCSCRE0_EL1); + } + if (ctxt_has_mte(ctxt)) { ctxt_sys_reg(ctxt, TFSR_EL1) = read_sysreg_el1(SYS_TFSR); ctxt_sys_reg(ctxt, TFSRE0_EL1) = read_sysreg_s(SYS_TFSRE0_EL1); @@ -95,6 +103,8 @@ static inline void __sysreg_restore_user_state(struct kvm_cpu_context *ctxt) { write_sysreg(ctxt_sys_reg(ctxt, TPIDR_EL0), tpidr_el0); write_sysreg(ctxt_sys_reg(ctxt, TPIDRRO_EL0), tpidrro_el0); + if (has_gcs()) + write_sysreg_s(ctxt_sys_reg(ctxt, GCSPR_EL0), SYS_GCSPR_EL0); } static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt) @@ -138,6 +148,13 @@ static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt) write_sysreg(ctxt_sys_reg(ctxt, PAR_EL1), par_el1); write_sysreg(ctxt_sys_reg(ctxt, TPIDR_EL1), tpidr_el1); + if (has_gcs()) { + write_sysreg_el1(ctxt_sys_reg(ctxt, GCSPR_EL1), SYS_GCSPR); + write_sysreg_el1(ctxt_sys_reg(ctxt, GCSCR_EL1), SYS_GCSCR); + write_sysreg_s(ctxt_sys_reg(ctxt, GCSCRE0_EL1), + SYS_GCSCRE0_EL1); + } + if (ctxt_has_mte(ctxt)) { write_sysreg_el1(ctxt_sys_reg(ctxt, TFSR_EL1), SYS_TFSR); write_sysreg_s(ctxt_sys_reg(ctxt, TFSRE0_EL1), SYS_TFSRE0_EL1); diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 2ca2973abe66..5b2f238d33be 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1768,6 +1768,23 @@ static unsigned int mte_visibility(const struct kvm_vcpu *vcpu, .visibility = mte_visibility, \ } +static unsigned int gcs_visibility(const struct kvm_vcpu *vcpu, + const struct sys_reg_desc *rd) +{ + if (has_gcs()) + return 0; + + return REG_HIDDEN; +} + +#define GCS_REG(name) { \ + SYS_DESC(SYS_##name), \ + .access = undef_access, \ + .reset = reset_unknown, \ + .reg = name, \ + .visibility = gcs_visibility, \ +} + static unsigned int el2_visibility(const struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd) { @@ -2080,6 +2097,10 @@ static const struct sys_reg_desc sys_reg_descs[] = { PTRAUTH_KEY(APDB), PTRAUTH_KEY(APGA), + GCS_REG(GCSCR_EL1), + GCS_REG(GCSPR_EL1), + GCS_REG(GCSCRE0_EL1), + { SYS_DESC(SYS_SPSR_EL1), access_spsr}, { SYS_DESC(SYS_ELR_EL1), access_elr}, @@ -2162,6 +2183,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { { SYS_DESC(SYS_SMIDR_EL1), undef_access }, { SYS_DESC(SYS_CSSELR_EL1), access_csselr, reset_unknown, CSSELR_EL1 }, { SYS_DESC(SYS_CTR_EL0), access_ctr }, + GCS_REG(GCSPR_EL0), { SYS_DESC(SYS_SVCR), undef_access }, { PMU_SYS_REG(PMCR_EL0), .access = access_pmcr, -- 2.30.2