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a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1689816694; bh=UDoAwOoTRFMVXMbtpTIjACSb6DxR18kojrUncbeOA18=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Va7hgLXLrKKOJjpAv2HcDzaAhxIkO+JYdw5MfU+6lVXsogaHmRH/WW+YxtrWObKj+ 2Be8/jJ+YOy9V34SJzjspVfn/yMS6pxozyYmqvt6jWy+Bb0EUnTkXU50EN3h8wA5zl Eh3284/BNRh/C3Pf8LDg3YFy1pX0OfrShi4W8xDCqX99AENT7rzbXFF6vzzKDoiaIR iIHc7E/kJonG4MfyYmTmi0I204S2MwjazVkPt5i5W+ibP5MRCwgSmX7Oj2+QQoncN2 mQnhGuWUzFV0Y+/Mu/kw6NsWbVNjpSprEjfV46jHsnPJx+/f8duJVJsoqzj6y6R5Fz FvbxJ2OhkGJUg== From: SeongJae Park To: Alistair Popple Cc: SeongJae Park , akpm@linux-foundation.org, ajd@linux.ibm.com, catalin.marinas@arm.com, fbarrat@linux.ibm.com, iommu@lists.linux.dev, jgg@ziepe.ca, jhubbard@nvidia.com, kevin.tian@intel.com, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org, mpe@ellerman.id.au, nicolinc@nvidia.com, npiggin@gmail.com, robin.murphy@arm.com, seanjc@google.com, will@kernel.org, x86@kernel.org, zhi.wang.linux@gmail.com Subject: Re: [PATCH v2 3/5] mmu_notifiers: Call invalidate_range() when invalidating TLBs Date: Thu, 20 Jul 2023 01:31:31 +0000 Message-Id: <20230720013131.1880-1-sj@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <877cqvl7vr.fsf@nvdebian.thelocal> References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: 5EA3B180005 X-Rspam-User: X-Rspamd-Server: rspam11 X-Stat-Signature: eoyoz9kuya3eb95sdrbwyacp6bpu4wje X-HE-Tag: 1689816696-592060 X-HE-Meta: U2FsdGVkX1+SqGoGFHoV70C0TBtj4e7voELv4Tf/Kx35zFnZV6geriuIrEY+lnCmFTnWTgR1AYX72vDSwma+XUEf/V4XdF5cM8gb4EwtTcnCO8vbJk6ha8FnPgXnLwWj9UzDfrbNJDNIX3yH8ryqUGFf6BjRnQ5AwuxayaSK6+6on4/KDqiprxV8lGzXvfQbsZmqEEWVxQPkZQXXSmACAJvEBZE/QEKhksm/HOzvJ0hw6zC1ujNDmudrj0vnpJ+MtwFz6hHjLw2z9stCSk4km3Fs8EVjexvZdSya70PtFUVlZa+RF53s+yIzRN7O5MvwCUbU6kQ24PNOleDd8NuoHu8D6T+clBXYYmUpq7Slha5GRqErKgeUi5cNlqprANYurfliw1RnRNnkOZXkcuCffSpKk2XDgHLbg4pkelMSVX1/EF/NnA0+fErDBqY2Hv+ixWxepvZ+pmYm8cSB3FO3iqTU3vX1JE3B/k0kJvrRuqsoKU/aOhih43ccpnbLtSuGle91ufK+/7Ok8WEqZnhNih54qu9ll9HUMgJnI4S6rf8PoG334S+xErEOatcj4vgXqLAoPiiNULjB/MPIcfgLktI3lljyP8AypXSnd2guPGck4JIoIBFZIrQD5pK1QrhsUW7Oe+4PpKkkcUfeKo4XStrD65xrGjiD+mJywLCcc8AasbKLRO+ER4HnzR71BMYu9njDV9aW2N8enCRYr6uzKv5npTRTiEhMIUIA2tkoY8eZGrhtQbtNal8Y6q44LkbINPlAuaZA2+IpUyRuePMISY+j6BN8kJ0CSYDD6RCYvSC0nSzhM0IcqprvLfmkzHJnjt1uzrGpH36kjYRKLtn5NMZ+i9bx2Mv5VDUDpphFIyPMGXJX26Ksr05c7svtVYjyGuJgJqBawpeX2M0qu7ljnik7Gebp2alPHyZEDw8qauEvxdLZ1x0J3vpxJZlKs0b69EaMCeBd+SBtyb4KsPD +DrYRoMl NyQMzWwiiwNfPzu9DaiDs5egkhTItMJsEzh221grbTiMy26etGlUsKvZt/rtoJxC24TCPK4BwDBNIu3c/oI219fhdDU+kpy0xbWDSx9Pxy836m/O1Pm1up+sEG07LYiv6jGi89o3ISm+Ze8+RSFuc9sqfTdHLf4BUhFvhlMJD0WhvVcI67Rwg+D1t/kTAwz+hkYUk6XcqQHw/00/IShbtgYdZWlv/zJN4VBAC85d4m2OZWWRRCiJfb7lbYPmlMNCydeGxcgWGd5reLdHImMZsd/9dFNciriPj4iwJiBYJjqUHhVpsK1mWW5SE7g61X5062VeI3Id1qY7I2/GnJwzcH7YhCaHBOcJwE9C3qyWbuRhaGHW539L9jLwfl7TP61kfm/3ouoMYnjgtWKjqSIqCpqv1MaT/eZddBGwNBWlVgDz8C8H4HXVNs2UdenV4WRmrd1OOB6y3GOkaCar5Cr6Bi/yZbEGfGyeJpQ8VK7gr3a8t1ZRE2xdMhgtF45f+4y6n4ZBWWScDVy/wWGQxaWfPoYPFdzYCzzd92RfS X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Thu, 20 Jul 2023 10:52:59 +1000 Alistair Popple wrote: > > SeongJae Park writes: > > > Hi Alistair, > > > > On Wed, 19 Jul 2023 22:18:44 +1000 Alistair Popple wrote: > > > >> The invalidate_range() is going to become an architecture specific mmu > >> notifier used to keep the TLB of secondary MMUs such as an IOMMU in > >> sync with the CPU page tables. Currently it is called from separate > >> code paths to the main CPU TLB invalidations. This can lead to a > >> secondary TLB not getting invalidated when required and makes it hard > >> to reason about when exactly the secondary TLB is invalidated. > >> > >> To fix this move the notifier call to the architecture specific TLB > >> maintenance functions for architectures that have secondary MMUs > >> requiring explicit software invalidations. > >> > >> This fixes a SMMU bug on ARM64. On ARM64 PTE permission upgrades > >> require a TLB invalidation. This invalidation is done by the > >> architecutre specific ptep_set_access_flags() which calls > >> flush_tlb_page() if required. However this doesn't call the notifier > >> resulting in infinite faults being generated by devices using the SMMU > >> if it has previously cached a read-only PTE in it's TLB. > >> > >> Moving the invalidations into the TLB invalidation functions ensures > >> all invalidations happen at the same time as the CPU invalidation. The > >> architecture specific flush_tlb_all() routines do not call the > >> notifier as none of the IOMMUs require this. > >> > >> Signed-off-by: Alistair Popple > >> Suggested-by: Jason Gunthorpe > > > > I found below kernel NULL-dereference issue on latest mm-unstable tree, and > > bisect points me to the commit of this patch, namely > > 75c400f82d347af1307010a3e06f3aa5d831d995. > > > > To reproduce, I use 'stress-ng --bigheap $(nproc)'. The issue happens as soon > > as it starts reclaiming memory. I didn't dive deep into this yet, but > > reporting this issue first, since you might have an idea already. > > Thanks for the report SJ! > > I see the problem - current->mm can (obviously!) be NULL which is what's > leading to the NULL dereference. Instead I think on x86 I need to call > the notifier when adding the invalidate to the tlbbatch in > arch_tlbbatch_add_pending() which is equivalent to what ARM64 does. > > The below should fix it. Will do a respin with this. Thank you for this quick reply! I confirm this fixes my issue. Tested-by: SeongJae Park > > --- > > diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h > index 837e4a50281a..79c46da919b9 100644 > --- a/arch/x86/include/asm/tlbflush.h > +++ b/arch/x86/include/asm/tlbflush.h > @@ -4,6 +4,7 @@ > > #include > #include > +#include Nit. How about putting it between mm_types.h and sched.h, so that it looks alphabetically sorted? > > #include > #include > @@ -282,6 +283,7 @@ static inline void arch_tlbbatch_add_pending(struct arch_tlbflush_unmap_batch *b > { > inc_mm_tlb_gen(mm); > cpumask_or(&batch->cpumask, &batch->cpumask, mm_cpumask(mm)); > + mmu_notifier_arch_invalidate_secondary_tlbs(mm, 0, -1UL); > } > > static inline void arch_flush_tlb_batched_pending(struct mm_struct *mm) > diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c > index 0b990fb56b66..2d253919b3e8 100644 > --- a/arch/x86/mm/tlb.c > +++ b/arch/x86/mm/tlb.c > @@ -1265,7 +1265,6 @@ void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch) > > put_flush_tlb_info(); > put_cpu(); > - mmu_notifier_arch_invalidate_secondary_tlbs(current->mm, 0, -1UL); > } > > /* > > Thanks, SJ