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X-IronPort-AV: E=McAfee;i="6600,9927,10736"; a="421186416" X-IronPort-AV: E=Sophos;i="6.00,229,1681196400"; d="scan'208";a="421186416" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2023 06:18:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10736"; a="743484861" X-IronPort-AV: E=Sophos;i="6.00,229,1681196400"; d="scan'208";a="743484861" Received: from mbahx-mobl1.ger.corp.intel.com (HELO box.shutemov.name) ([10.249.43.216]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2023 06:17:57 -0700 Received: by box.shutemov.name (Postfix, from userid 1000) id A7B32109B7B; Fri, 9 Jun 2023 16:17:54 +0300 (+03) Date: Fri, 9 Jun 2023 16:17:54 +0300 From: kirill.shutemov@linux.intel.com To: Kai Huang Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-mm@kvack.org, dave.hansen@intel.com, tony.luck@intel.com, peterz@infradead.org, tglx@linutronix.de, seanjc@google.com, pbonzini@redhat.com, david@redhat.com, dan.j.williams@intel.com, rafael.j.wysocki@intel.com, ying.huang@intel.com, reinette.chatre@intel.com, len.brown@intel.com, ak@linux.intel.com, isaku.yamahata@intel.com, chao.gao@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, bagasdotme@gmail.com, sagis@google.com, imammedo@redhat.com Subject: Re: [PATCH v11 19/20] x86/mce: Improve error log of kernel space TDX #MC due to erratum Message-ID: <20230609131754.dhii5ctfwtzx667o@box.shutemov.name> References: <116cafb15625ac0bcda7b47143921d0c42061b69.1685887183.git.kai.huang@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <116cafb15625ac0bcda7b47143921d0c42061b69.1685887183.git.kai.huang@intel.com> X-Rspamd-Queue-Id: 839561C0021 X-Rspam-User: X-Rspamd-Server: rspam11 X-Stat-Signature: sszddb569qcgtzoqu5fdus7op1h7xt18 X-HE-Tag: 1686316685-156502 X-HE-Meta: U2FsdGVkX19zewRj7R2ldzpN6rKInfkjXZf+xkJgapnsGt1gUq/IrC2cDYy5zfLapYVE2iMcNJ4QFxoYFJeQwl1baWDFBzgrpXDNVZokiKyJUGAFCEGVH6LWHPtpTXnEiH01zUb/MhjqBoFj3uzYWIeCibnDHu+65FXLUn6AYBrZntCp6qauwSXD+C24ykVIScDp3IPUfR9/en3GlJVqVn7IDmZ/5ddJo1IaYgz7T3JRFbUauw+LKseGGY8oPDh5nwFzyq393Q0d7fYF2Z7gFeuAiVfCCIud6CUxST2tx7elHe0JL+2DEg2FlKKzBsHTYy2AaiRwvnOvj3sYg96APIeipjQRou6NfBnnTIs5wmIJivv5M6vDLRTW1sDIEDK5FeV6kq2PDLfMOqMkA1NlYQmd4boECYA00OgCVswo7UZ2b9OjThMEl3dhsGxu4/jVDwrrkf9FBFz8S0IoxvWuCD7knKd6TPCflW1lSuzeo2L37QD2V423yoNe3FarPx2/6HKdqxj89+ila2ebH7CjH8sCeGEZGOx5yfvXB/iNip+WnPEk2gAaLOeA7zMdobuLg3bYEhTg0ZaZBmJ+54Xw0qNpYva1L0kQHmI+/nk8ii0n7gDJ1P0DjtF0tvHFqoyl1XbTp9GntJQLFi2Xyyn4e9p7l3O/V8a/Hb8402+uKCNAoAz8S2G9/RE7lj91XXuZrd7+JVje5KzkP0zzSP3y60DGlOONmQQVm1lhmRlIiOnDtikvyfE1lvLxhdChtM276DIJrRSIDL9nlQAFijKWf/pb/0jB/SEL+g2h/u7AfhaDBw637hWYbYQoC50hyf02qYL0Zp73BPsjwTT+/HcMm3pFtTJajt1F27nMrk8OvzYfXt2Ebmd19wEXfHH3xVNyhtGwE+5WZlRAa8riDEvooXD9yiq3lXk78tXgsbMSn8TLEPXKvZ9Mjki7roR49C0g33MMivTqxyFPdIaOtd5 9nhfyv+h Lp8Qq/OyHbMil3M5jhyaFm5pwd2/iMQuAtb0SXXPyMAE4NMLb2lRjJOo3g7Jh8t3rtmmfjrr9xIqB5UzwddOoH/qWrXd9FMzXLCrZnLS3yatqucg= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Mon, Jun 05, 2023 at 02:27:32AM +1200, Kai Huang wrote: > The first few generations of TDX hardware have an erratum. Triggering > it in Linux requires some kind of kernel bug involving relatively exotic > memory writes to TDX private memory and will manifest via > spurious-looking machine checks when reading the affected memory. > > == Background == > > Virtually all kernel memory accesses operations happen in full > cachelines. In practice, writing a "byte" of memory usually reads a 64 > byte cacheline of memory, modifies it, then writes the whole line back. > Those operations do not trigger this problem. > > This problem is triggered by "partial" writes where a write transaction > of less than cacheline lands at the memory controller. The CPU does > these via non-temporal write instructions (like MOVNTI), or through > UC/WC memory mappings. The issue can also be triggered away from the > CPU by devices doing partial writes via DMA. > > == Problem == > > A partial write to a TDX private memory cacheline will silently "poison" > the line. Subsequent reads will consume the poison and generate a > machine check. According to the TDX hardware spec, neither of these > things should have happened. > > To add insult to injury, the Linux machine code will present these as a > literal "Hardware error" when they were, in fact, a software-triggered > issue. > > == Solution == > > In the end, this issue is hard to trigger. Rather than do something > rash (and incomplete) like unmap TDX private memory from the direct map, > improve the machine check handler. > > Currently, the #MC handler doesn't distinguish whether the memory is > TDX private memory or not but just dump, for instance, below message: > > [...] mce: [Hardware Error]: CPU 147: Machine Check Exception: f Bank 1: bd80000000100134 > [...] mce: [Hardware Error]: RIP 10: {__tlb_remove_page_size+0x10/0xa0} > ... > [...] mce: [Hardware Error]: Run the above through 'mcelog --ascii' > [...] mce: [Hardware Error]: Machine check: Data load in unrecoverable area of kernel > [...] Kernel panic - not syncing: Fatal local machine check > > Which says "Hardware Error" and "Data load in unrecoverable area of > kernel". > > Ideally, it's better for the log to say "software bug around TDX private > memory" instead of "Hardware Error". But in reality the real hardware > memory error can happen, and sadly such software-triggered #MC cannot be > distinguished from the real hardware error. Also, the error message is > used by userspace tool 'mcelog' to parse, so changing the output may > break userspace. > > So keep the "Hardware Error". The "Data load in unrecoverable area of > kernel" is also helpful, so keep it too. > > Instead of modifying above error log, improve the error log by printing > additional TDX related message to make the log like: > > ... > [...] mce: [Hardware Error]: Machine check: Data load in unrecoverable area of kernel > [...] mce: [Hardware Error]: Machine Check: Memory error from TDX private memory. May be result of CPU erratum. The message mentions one part of issue -- CPU erratum -- but misses the other required part -- kernel bug that makes kernel access the memory it not suppose to. -- Kiryl Shutsemau / Kirill A. Shutemov