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Wed, 19 Apr 2023 15:18:28 -0700 (PDT) From: Atish Patra To: linux-kernel@vger.kernel.org Cc: Atish Patra , Rajnesh Kanwal , Alexandre Ghiti , Andrew Jones , Andrew Morton , Anup Patel , Atish Patra , =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= , Suzuki K Poulose , Will Deacon , Marc Zyngier , Sean Christopherson , linux-coco@lists.linux.dev, Dylan Reid , abrestic@rivosinc.com, Samuel Ortiz , Christoph Hellwig , Conor Dooley , Greg Kroah-Hartman , Guo Ren , Heiko Stuebner , Jiri Slaby , kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, Mayuresh Chitale , Palmer Dabbelt , Paolo Bonzini , Paul Walmsley , Uladzislau Rezki Subject: [RFC 27/48] RISC-V: KVM: Implement COVI SBI extension Date: Wed, 19 Apr 2023 15:16:55 -0700 Message-Id: <20230419221716.3603068-28-atishp@rivosinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230419221716.3603068-1-atishp@rivosinc.com> References: <20230419221716.3603068-1-atishp@rivosinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Rspamd-Server: rspam07 X-Rspamd-Queue-Id: C35EE4000D X-Rspam-User: X-Stat-Signature: eojg8ofeokfzomrcbim68ayuqukh5y14 X-HE-Tag: 1681942709-552032 X-HE-Meta: U2FsdGVkX19dr/acPKEMasJJkIZQPT6QdszRp0NqBzZwZipoG3yJfW/22+UK/uHepcQmROsVaDPlVpnwT0SWn+B5iNahmImJ9Bwp0em8qFXG0pvK/RyfVsY0rFTbrZwSmSYhBTcl3LTb1mImv8boKWvV+o6AjS3qOhCWLsSQcJ02KZnZqjA3LCg1KmkXKuoDK9eR5EBgYjTHBuj00V8KCE2YEFhOiAEkjIBPH7hXz3no5ztWtHfKbXx07k1+V/uIdO53MY1LZ7bMnxaiWXC4CjjrO1acYAaksb4Qsadu1f1mFqtOFLDpNuEssTHZZdAj0dGGcRAa1D5X6j6BGYohVtWLURjaKGJHKyu3ffgg+x/UIIXJWhCQTsFn7Zv66F7k+RpJvOdK518gXAwpjrNtUYcmgxFmWfATTaZqaGamx2cV3+U1Tr8b0+J88T+ei/wBcZ7hf399RBxVkL8+Om5IdA/V9XgxXkWQexrMgfhbcxmyx6Q2Ie5pmLOiCEt3nfKO/m02H2oUQwEBl4dg7FBGF+3DkljESDuMigjBjuB3KfisrJfiejVYNhDQvaKRPzVwzCSvhx9mWK8I1ctlgdK7XLy9P7kQiXI3LMsSJlYCy2NbI47uE3uWl0n7nDfCjXlYxVHzWjwQx5+CicYL69K8hOkgTrS8XKJWkYmimE/V6ARZXSNI+PxsllmLDow1ElOJIOW9Z882skkZDj22uhSUcTWj14r2qrnX93e8zED3oG2/pE9xejpAFC13qnOBTvj+srR3dLu2+Hn6gfyGT7ELJpNu7G9mEJSR/YjF+CJAonOyJir18jWi9fHxATNNRo5em/q/vloJhjzHVkZzdElZf22ABxBFCGaAgC3XLJzgL96/7RrJHbvsg9aA5LY8pueuXIHfyd7x9iwVbt3Mop7zIJNFJKUlRJvlKd62b7VOGa0uz6OCX32XZW582FGs3AbBVaJy0BcW8j/hzESwkSy SOEogRXs fCaitwOTNfrnA9xflD+KFCYTyv9xSgOEvF3lOAgqQMP6DRGvNF8xW6oRauKmu2VQklLVTw1XSevDqL2WdTpaiEH+soL7ewb7CndMnKva+gAGpGSDznzeQUc2y5sTrZd/k5xII4uexnMtMcO8JkYFQeGjwRkyt/yFyJricpnyRim5DsXjaMHEFg3oZW5Yu2/ulz01inDp2uTotce9dRRcs1qpW5zi8YDwFNRAk6kj2C/3V4W75cbrebxtNzIEzlWVmk61BzBP/Znp4mncjC0wMYpWq/mfBvso721UC7mE2vh2XIRSPUXXbjqkmSvxHJ3BbJr8+UFOka8BZiaszdQkhi1OPz2GnLXwbEWenrmo4GxQmFsGfIsgv/bfKhne3Db9WxjRKHfvb8DLO/14rYTCd95CCP5nxubqadl9SH0MqWzoxAfA1f6r9GOq+J9MBqmptdNWScRBInGvL6lL12n8eRQfxuA== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: CoVE specification defines a separate SBI extension to manage interrupts in TVM. This extension is known as COVI as both host & guest interface access these functions. This patch implements the functions defined by COVI. Co-developed-by: Rajnesh Kanwal Signed-off-by: Rajnesh Kanwal Signed-off-by: Atish Patra --- arch/riscv/include/asm/kvm_cove_sbi.h | 20 ++++ arch/riscv/kvm/cove_sbi.c | 164 ++++++++++++++++++++++++++ 2 files changed, 184 insertions(+) diff --git a/arch/riscv/include/asm/kvm_cove_sbi.h b/arch/riscv/include/asm/kvm_cove_sbi.h index df7d88c..0759f70 100644 --- a/arch/riscv/include/asm/kvm_cove_sbi.h +++ b/arch/riscv/include/asm/kvm_cove_sbi.h @@ -32,6 +32,7 @@ #define nacl_shmem_gpr_read_cove(__s, __g) \ nacl_shmem_scratch_read_long(__s, get_scratch_gpr_offset(__g)) +/* Functions related to CoVE Host Interface (COVH) Extension */ int sbi_covh_tsm_get_info(struct sbi_cove_tsm_info *tinfo_addr); int sbi_covh_tvm_initiate_fence(unsigned long tvmid); int sbi_covh_tsm_initiate_fence(void); @@ -58,4 +59,23 @@ int sbi_covh_create_tvm_vcpu(unsigned long tvmid, unsigned long tvm_vcpuid, int sbi_covh_run_tvm_vcpu(unsigned long tvmid, unsigned long tvm_vcpuid); +/* Functions related to CoVE Interrupt Management(COVI) Extension */ +int sbi_covi_tvm_aia_init(unsigned long tvm_gid, struct sbi_cove_tvm_aia_params *tvm_aia_params); +int sbi_covi_set_vcpu_imsic_addr(unsigned long tvm_gid, unsigned long vcpu_id, + unsigned long imsic_addr); +int sbi_covi_convert_imsic(unsigned long imsic_addr); +int sbi_covi_reclaim_imsic(unsigned long imsic_addr); +int sbi_covi_bind_vcpu_imsic(unsigned long tvm_gid, unsigned long vcpu_id, + unsigned long imsic_mask); +int sbi_covi_unbind_vcpu_imsic_begin(unsigned long tvm_gid, unsigned long vcpu_id); +int sbi_covi_unbind_vcpu_imsic_end(unsigned long tvm_gid, unsigned long vcpu_id); +int sbi_covi_inject_external_interrupt(unsigned long tvm_gid, unsigned long vcpu_id, + unsigned long interrupt_id); +int sbi_covi_rebind_vcpu_imsic_begin(unsigned long tvm_gid, unsigned long vcpu_id, + unsigned long imsic_mask); +int sbi_covi_rebind_vcpu_imsic_clone(unsigned long tvm_gid, unsigned long vcpu_id); +int sbi_covi_rebind_vcpu_imsic_end(unsigned long tvm_gid, unsigned long vcpu_id); + + + #endif diff --git a/arch/riscv/kvm/cove_sbi.c b/arch/riscv/kvm/cove_sbi.c index bf037f6..a8901ac 100644 --- a/arch/riscv/kvm/cove_sbi.c +++ b/arch/riscv/kvm/cove_sbi.c @@ -18,6 +18,170 @@ #define RISCV_COVE_ALIGN_4KB (1UL << 12) +int sbi_covi_tvm_aia_init(unsigned long tvm_gid, + struct sbi_cove_tvm_aia_params *tvm_aia_params) +{ + struct sbiret ret; + + unsigned long pa = __pa(tvm_aia_params); + + ret = sbi_ecall(SBI_EXT_COVI, SBI_EXT_COVI_TVM_AIA_INIT, tvm_gid, pa, + sizeof(*tvm_aia_params), 0, 0, 0); + if (ret.error) + return sbi_err_map_linux_errno(ret.error); + + return 0; +} + +int sbi_covi_set_vcpu_imsic_addr(unsigned long tvm_gid, unsigned long vcpu_id, + unsigned long imsic_addr) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_COVI, SBI_EXT_COVI_TVM_CPU_SET_IMSIC_ADDR, + tvm_gid, vcpu_id, imsic_addr, 0, 0, 0); + if (ret.error) + return sbi_err_map_linux_errno(ret.error); + + return 0; +} + +/* + * Converts the guest interrupt file at `imsic_addr` for use with a TVM. + * The guest interrupt file must not be used by the caller until reclaim. + */ +int sbi_covi_convert_imsic(unsigned long imsic_addr) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_COVI, SBI_EXT_COVI_TVM_CONVERT_IMSIC, + imsic_addr, 0, 0, 0, 0, 0); + if (ret.error) + return sbi_err_map_linux_errno(ret.error); + + return 0; +} + +int sbi_covi_reclaim_imsic(unsigned long imsic_addr) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_COVI, SBI_EXT_COVI_TVM_RECLAIM_IMSIC, + imsic_addr, 0, 0, 0, 0, 0); + if (ret.error) + return sbi_err_map_linux_errno(ret.error); + + return 0; +} + +/* + * Binds a vCPU to this physical CPU and the specified set of confidential guest + * interrupt files. + */ +int sbi_covi_bind_vcpu_imsic(unsigned long tvm_gid, unsigned long vcpu_id, + unsigned long imsic_mask) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_COVI, SBI_EXT_COVI_TVM_CPU_BIND_IMSIC, tvm_gid, + vcpu_id, imsic_mask, 0, 0, 0); + if (ret.error) + return sbi_err_map_linux_errno(ret.error); + + return 0; +} + +/* + * Begins the unbind process for the specified vCPU from this physical CPU and its guest + * interrupt files. The host must complete a TLB invalidation sequence for the TVM before + * completing the unbind with `unbind_vcpu_imsic_end()`. + */ +int sbi_covi_unbind_vcpu_imsic_begin(unsigned long tvm_gid, + unsigned long vcpu_id) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_COVI, SBI_EXT_COVI_TVM_CPU_UNBIND_IMSIC_BEGIN, + tvm_gid, vcpu_id, 0, 0, 0, 0); + if (ret.error) + return sbi_err_map_linux_errno(ret.error); + + return 0; +} + +/* + * Completes the unbind process for the specified vCPU from this physical CPU and its guest + * interrupt files. + */ +int sbi_covi_unbind_vcpu_imsic_end(unsigned long tvm_gid, unsigned long vcpu_id) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_COVI, SBI_EXT_COVI_TVM_CPU_UNBIND_IMSIC_END, + tvm_gid, vcpu_id, 0, 0, 0, 0); + if (ret.error) + return sbi_err_map_linux_errno(ret.error); + + return 0; +} + +/* + * Injects an external interrupt into the specified vCPU. The interrupt ID must + * have been allowed with `allow_external_interrupt()` by the guest. + */ +int sbi_covi_inject_external_interrupt(unsigned long tvm_gid, + unsigned long vcpu_id, + unsigned long interrupt_id) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_COVI, SBI_EXT_COVI_TVM_CPU_INJECT_EXT_INTERRUPT, + tvm_gid, vcpu_id, interrupt_id, 0, 0, 0); + if (ret.error) + return sbi_err_map_linux_errno(ret.error); + + return 0; +} + +int sbi_covi_rebind_vcpu_imsic_begin(unsigned long tvm_gid, + unsigned long vcpu_id, + unsigned long imsic_mask) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_COVI, SBI_EXT_COVI_TVM_REBIND_IMSIC_BEGIN, + tvm_gid, vcpu_id, imsic_mask, 0, 0, 0); + if (ret.error) + return sbi_err_map_linux_errno(ret.error); + + return 0; +} + +int sbi_covi_rebind_vcpu_imsic_clone(unsigned long tvm_gid, + unsigned long vcpu_id) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_COVI, SBI_EXT_COVI_TVM_REBIND_IMSIC_CLONE, + tvm_gid, vcpu_id, 0, 0, 0, 0); + if (ret.error) + return sbi_err_map_linux_errno(ret.error); + + return 0; +} + +int sbi_covi_rebind_vcpu_imsic_end(unsigned long tvm_gid, unsigned long vcpu_id) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_COVI, SBI_EXT_COVI_TVM_REBIND_IMSIC_END, + tvm_gid, vcpu_id, 0, 0, 0, 0); + if (ret.error) + return sbi_err_map_linux_errno(ret.error); + + return 0; +} + int sbi_covh_tsm_get_info(struct sbi_cove_tsm_info *tinfo_addr) { struct sbiret ret; -- 2.25.1