From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5179DC636CD for ; Fri, 10 Feb 2023 18:12:20 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id CDB9E28000D; Fri, 10 Feb 2023 13:12:19 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id C8BF5280003; Fri, 10 Feb 2023 13:12:19 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id B538828000D; Fri, 10 Feb 2023 13:12:19 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0014.hostedemail.com [216.40.44.14]) by kanga.kvack.org (Postfix) with ESMTP id A36E9280003 for ; Fri, 10 Feb 2023 13:12:19 -0500 (EST) Received: from smtpin29.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay07.hostedemail.com (Postfix) with ESMTP id 627A3160514 for ; Fri, 10 Feb 2023 18:12:19 +0000 (UTC) X-FDA: 80452176798.29.38E1E90 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) by imf12.hostedemail.com (Postfix) with ESMTP id 256854000D for ; Fri, 10 Feb 2023 18:12:16 +0000 (UTC) Authentication-Results: imf12.hostedemail.com; dkim=none; dmarc=pass (policy=quarantine) header.from=huawei.com; spf=pass (imf12.hostedemail.com: domain of jonathan.cameron@huawei.com designates 185.176.79.56 as permitted sender) smtp.mailfrom=jonathan.cameron@huawei.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1676052737; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=m6ch0kv4qQHe7gVH+tm4XBeQLNsXvtBJWnCiUAXDSYE=; b=P8G/N7eA4B/Hhvf2RTRdF4XTDK8iSjLqGC1oX9RqEj0hJphN77X/u3O7d7tXy870co+BH6 I1oPF+314Jb4l/vdg6/oHpXtIFEyASS1fZnjUN/B2hLMt92pliGJ7n91yO7kqZkNDMxhuF myGCzRyb1PfmdMDLTW1noNiAZLDRWSc= ARC-Authentication-Results: i=1; imf12.hostedemail.com; dkim=none; dmarc=pass (policy=quarantine) header.from=huawei.com; spf=pass (imf12.hostedemail.com: domain of jonathan.cameron@huawei.com designates 185.176.79.56 as permitted sender) smtp.mailfrom=jonathan.cameron@huawei.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1676052737; a=rsa-sha256; cv=none; b=YYmTmcNgf5clXApZ8vF0yt24MUYts1K9OABflpGjaEVpIpV75cauWXW4qqsoHkeHUL0xcS wjKcpJKtHKFskqs7RuhXInP9gZAeG7DczdRKMXShNzGxsgfrT7HglVSw3q80ZFJTff/mjI 8pV1ownrdD8j2RRZHH9cGgb1EjSwI8Q= Received: from lhrpeml500005.china.huawei.com (unknown [172.18.147.200]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4PD1xd50LFz6J91l; Sat, 11 Feb 2023 02:10:45 +0800 (CST) Received: from localhost (10.81.210.211) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.17; Fri, 10 Feb 2023 18:12:14 +0000 Date: Fri, 10 Feb 2023 18:12:13 +0000 From: Jonathan Cameron To: Dan Williams CC: , Fan Ni , , , , Subject: Re: [PATCH v2 14/20] tools/testing/cxl: Define a fixed volatile configuration to parse Message-ID: <20230210181213.00001941@Huawei.com> In-Reply-To: <167602000547.1924368.11613151863880268868.stgit@dwillia2-xfh.jf.intel.com> References: <167601992097.1924368.18291887895351917895.stgit@dwillia2-xfh.jf.intel.com> <167602000547.1924368.11613151863880268868.stgit@dwillia2-xfh.jf.intel.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.81.210.211] X-ClientProxiedBy: lhrpeml500004.china.huawei.com (7.191.163.9) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected X-Rspamd-Server: rspam05 X-Rspamd-Queue-Id: 256854000D X-Stat-Signature: xn36xmy95ab8i8npqmioegk9f5inbxy5 X-Rspam-User: X-HE-Tag: 1676052736-174639 X-HE-Meta: U2FsdGVkX19PHB1Sdb+rwsThEoCB53lUMQb+/uuL4NiRG+2J+uYI+ATcDf94GzLQECFVoO4TW3Bjr9HC7bfsCH6FXJb76GC7gtwG1nzx0WSI7YTOMX9GuY9QDkdltacvfjftCC1bCUsSdw4fyBhSse0JLbSgPWfNsYaGtLjY8IorF2mAJp2cVwXEXaQ1b8mKwwpSeetjJICg68E/2Dx2B8tIwnnXpOKfrufZIuUAHHRmVS89PNPAVVS2XTiHHMq56dUBwvu+04X2DkFxdJCZ9tbOdJnnAInWN7V0ltANimD7kRVwnxP01Fs3CyzYY+qgidahl99E5KM273zcWQqb0o3hkImUbSB638YRtoYRQo12Zp11yhaPLOcLvqLnpS9xPL854+bHFsKbhdj76OspUUvvIkYHxRiBR61YH5YkYzY1NqOY5bAl4ES8AP/YiBTcghBImyIQGEWOI/7LXWZDFY4wYSFgvlqJXfgkvCLwdJLDh1U984xn70Jq/gBwm+xU5oaB/ewWUJnnFj8/nDQRiXv4BnO/fmDclbtEwPn5hwDqgvJINa1silhmVEiCHWnKkSoLZ1s5RNCtAcQzVl9ItVzoAmLnXcbfARfr3Tm07NF7ucoIhwhcg6oft7GIjbogzF/k1WTMOpCw3YOsIJfPuJwGgec9mEd4bd0cpbYppjx/vLOzVX+JcxG5g1ZjNUmnepU3qAJn8NOuFCZ+P+qNViMVlZkYseipkIJTqc0GbkYYi5bzFgv6ReBdaWfBwj/LSYFLkRKAqVLBPAN3DguUm7fxAXl59zwjxgwi/t7SB86V0nj3oCz7NYC7B/x6tiK+l36YEVgBm7JLPEyvDbQMeofEukqQzVdrADQG4gPF40+LCIkb9Z0A5ylJG34anEmZAQEoINaiv46yXfdPeNqc2ILN0hZoU86fUQ9OLH/icc7TJ7q1VwQaKJqd5LyL4WXAEfx9JjOe2Go0fgoXeg6 I9qulJCm Tu8zHN4lvHW7SJzJoh+/doX5149N9Pd+VpoQO6d1k7c5+fvKclJrU8EgMjkRC9cnQOVvj4wC4U4Sj0mF//qN6phhj71fIlrG4jGCJ8OJ0biSPYFRi1eZpdgSC0DCRw256o18akP9j9XXtzyXqMc1uNfsnyw97s//UgLgfZX79/JyPqJ35h/ZyUFSWlxwVEgvCn3w9fI6XXzVAnO2SX3KNnv15ed2ijk8LbkawjICpTwkoMOPNPXPF/8X6BvXXp11d9GLSNfoxU/jKAH8uuOlRcNHVaGCQZpZCwkoGqXugiSPAmrrKwFP4xYEzIAARHP1lZc/U5/9VDWWIceMfKrKvz9sI/mYS22DHRDDg X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Fri, 10 Feb 2023 01:06:45 -0800 Dan Williams wrote: > Take two endpoints attached to the first switch on the first host-bridge > in the cxl_test topology and define a pre-initialized region. This is a > x2 interleave underneath a x1 CXL Window. > > $ modprobe cxl_test > $ # cxl list -Ru > { > "region":"region3", > "resource":"0xf010000000", > "size":"512.00 MiB (536.87 MB)", > "interleave_ways":2, > "interleave_granularity":4096, > "decode_state":"commit" > } > > Tested-by: Fan Ni > Link: https://lore.kernel.org/r/167564541523.847146.12199636368812381475.stgit@dwillia2-xfh.jf.intel.com > Signed-off-by: Dan Williams The few things I commented on v1 resolved so Reviewed-by: Jonathan Cameron > --- > drivers/cxl/core/core.h | 3 - > drivers/cxl/core/hdm.c | 3 + > drivers/cxl/core/port.c | 2 + > drivers/cxl/cxl.h | 2 + > drivers/cxl/cxlmem.h | 3 + > tools/testing/cxl/test/cxl.c | 147 +++++++++++++++++++++++++++++++++++++++--- > 6 files changed, 146 insertions(+), 14 deletions(-) > > diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h > index 5eb873da5a30..479f01da6d35 100644 > --- a/drivers/cxl/core/core.h > +++ b/drivers/cxl/core/core.h > @@ -57,9 +57,6 @@ resource_size_t cxl_dpa_size(struct cxl_endpoint_decoder *cxled); > resource_size_t cxl_dpa_resource_start(struct cxl_endpoint_decoder *cxled); > extern struct rw_semaphore cxl_dpa_rwsem; > > -bool is_switch_decoder(struct device *dev); > -struct cxl_switch_decoder *to_cxl_switch_decoder(struct device *dev); > - > int cxl_memdev_init(void); > void cxl_memdev_exit(void); > void cxl_mbox_init(void); > diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c > index 8c29026a4b9d..80eccae6ba9e 100644 > --- a/drivers/cxl/core/hdm.c > +++ b/drivers/cxl/core/hdm.c > @@ -279,7 +279,7 @@ static int __cxl_dpa_reserve(struct cxl_endpoint_decoder *cxled, > return 0; > } > > -static int devm_cxl_dpa_reserve(struct cxl_endpoint_decoder *cxled, > +int devm_cxl_dpa_reserve(struct cxl_endpoint_decoder *cxled, > resource_size_t base, resource_size_t len, > resource_size_t skipped) > { > @@ -295,6 +295,7 @@ static int devm_cxl_dpa_reserve(struct cxl_endpoint_decoder *cxled, > > return devm_add_action_or_reset(&port->dev, cxl_dpa_release, cxled); > } > +EXPORT_SYMBOL_NS_GPL(devm_cxl_dpa_reserve, CXL); > > resource_size_t cxl_dpa_size(struct cxl_endpoint_decoder *cxled) > { > diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c > index 59620528571a..b45d2796ef35 100644 > --- a/drivers/cxl/core/port.c > +++ b/drivers/cxl/core/port.c > @@ -458,6 +458,7 @@ bool is_switch_decoder(struct device *dev) > { > return is_root_decoder(dev) || dev->type == &cxl_decoder_switch_type; > } > +EXPORT_SYMBOL_NS_GPL(is_switch_decoder, CXL); > > struct cxl_decoder *to_cxl_decoder(struct device *dev) > { > @@ -485,6 +486,7 @@ struct cxl_switch_decoder *to_cxl_switch_decoder(struct device *dev) > return NULL; > return container_of(dev, struct cxl_switch_decoder, cxld.dev); > } > +EXPORT_SYMBOL_NS_GPL(to_cxl_switch_decoder, CXL); > > static void cxl_ep_release(struct cxl_ep *ep) > { > diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h > index c8ee4bb8cce6..2ac344235235 100644 > --- a/drivers/cxl/cxl.h > +++ b/drivers/cxl/cxl.h > @@ -653,8 +653,10 @@ struct cxl_dport *devm_cxl_add_rch_dport(struct cxl_port *port, > > struct cxl_decoder *to_cxl_decoder(struct device *dev); > struct cxl_root_decoder *to_cxl_root_decoder(struct device *dev); > +struct cxl_switch_decoder *to_cxl_switch_decoder(struct device *dev); > struct cxl_endpoint_decoder *to_cxl_endpoint_decoder(struct device *dev); > bool is_root_decoder(struct device *dev); > +bool is_switch_decoder(struct device *dev); > bool is_endpoint_decoder(struct device *dev); > struct cxl_root_decoder *cxl_root_decoder_alloc(struct cxl_port *port, > unsigned int nr_targets, > diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h > index c9da3c699a21..bf7d4c5c8612 100644 > --- a/drivers/cxl/cxlmem.h > +++ b/drivers/cxl/cxlmem.h > @@ -81,6 +81,9 @@ static inline bool is_cxl_endpoint(struct cxl_port *port) > } > > struct cxl_memdev *devm_cxl_add_memdev(struct cxl_dev_state *cxlds); > +int devm_cxl_dpa_reserve(struct cxl_endpoint_decoder *cxled, > + resource_size_t base, resource_size_t len, > + resource_size_t skipped); > > static inline struct cxl_ep *cxl_ep_load(struct cxl_port *port, > struct cxl_memdev *cxlmd) > diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c > index 920bd969c554..5342f69d70d2 100644 > --- a/tools/testing/cxl/test/cxl.c > +++ b/tools/testing/cxl/test/cxl.c > @@ -703,6 +703,142 @@ static int mock_decoder_reset(struct cxl_decoder *cxld) > return 0; > } > > +static void default_mock_decoder(struct cxl_decoder *cxld) > +{ > + cxld->hpa_range = (struct range){ > + .start = 0, > + .end = -1, > + }; > + > + cxld->interleave_ways = 1; > + cxld->interleave_granularity = 256; > + cxld->target_type = CXL_DECODER_EXPANDER; > + cxld->commit = mock_decoder_commit; > + cxld->reset = mock_decoder_reset; > +} > + > +static int first_decoder(struct device *dev, void *data) > +{ > + struct cxl_decoder *cxld; > + > + if (!is_switch_decoder(dev)) > + return 0; > + cxld = to_cxl_decoder(dev); > + if (cxld->id == 0) > + return 1; > + return 0; > +} > + > +static void mock_init_hdm_decoder(struct cxl_decoder *cxld) > +{ > + struct acpi_cedt_cfmws *window = mock_cfmws[0]; > + struct platform_device *pdev = NULL; > + struct cxl_endpoint_decoder *cxled; > + struct cxl_switch_decoder *cxlsd; > + struct cxl_port *port, *iter; > + const int size = SZ_512M; > + struct cxl_memdev *cxlmd; > + struct cxl_dport *dport; > + struct device *dev; > + bool hb0 = false; > + u64 base; > + int i; > + > + if (is_endpoint_decoder(&cxld->dev)) { > + cxled = to_cxl_endpoint_decoder(&cxld->dev); > + cxlmd = cxled_to_memdev(cxled); > + WARN_ON(!dev_is_platform(cxlmd->dev.parent)); > + pdev = to_platform_device(cxlmd->dev.parent); > + > + /* check is endpoint is attach to host-bridge0 */ > + port = cxled_to_port(cxled); > + do { > + if (port->uport == &cxl_host_bridge[0]->dev) { > + hb0 = true; > + break; > + } > + if (is_cxl_port(port->dev.parent)) > + port = to_cxl_port(port->dev.parent); > + else > + port = NULL; > + } while (port); > + port = cxled_to_port(cxled); > + } > + > + /* > + * The first decoder on the first 2 devices on the first switch > + * attached to host-bridge0 mock a fake / static RAM region. All > + * other decoders are default disabled. Given the round robin > + * assignment those devices are named cxl_mem.0, and cxl_mem.4. > + * > + * See 'cxl list -BMPu -m cxl_mem.0,cxl_mem.4' > + */ > + if (!hb0 || pdev->id % 4 || pdev->id > 4 || cxld->id > 0) { > + default_mock_decoder(cxld); > + return; > + } > + > + base = window->base_hpa; > + cxld->hpa_range = (struct range) { > + .start = base, > + .end = base + size - 1, > + }; > + > + cxld->interleave_ways = 2; > + eig_to_granularity(window->granularity, &cxld->interleave_granularity); > + cxld->target_type = CXL_DECODER_EXPANDER; > + cxld->flags = CXL_DECODER_F_ENABLE; > + cxled->state = CXL_DECODER_STATE_AUTO; > + port->commit_end = cxld->id; > + devm_cxl_dpa_reserve(cxled, 0, size / cxld->interleave_ways, 0); > + cxld->commit = mock_decoder_commit; > + cxld->reset = mock_decoder_reset; > + > + /* > + * Now that endpoint decoder is set up, walk up the hierarchy > + * and setup the switch and root port decoders targeting @cxlmd. > + */ > + iter = port; > + for (i = 0; i < 2; i++) { > + dport = iter->parent_dport; > + iter = dport->port; > + dev = device_find_child(&iter->dev, NULL, first_decoder); > + /* > + * Ancestor ports are guaranteed to be enumerated before > + * @port, and all ports have at least one decoder. > + */ > + if (WARN_ON(!dev)) > + continue; > + cxlsd = to_cxl_switch_decoder(dev); > + if (i == 0) { > + /* put cxl_mem.4 second in the decode order */ > + if (pdev->id == 4) > + cxlsd->target[1] = dport; > + else > + cxlsd->target[0] = dport; > + } else > + cxlsd->target[0] = dport; > + cxld = &cxlsd->cxld; > + cxld->target_type = CXL_DECODER_EXPANDER; > + cxld->flags = CXL_DECODER_F_ENABLE; > + iter->commit_end = 0; > + /* > + * Switch targets 2 endpoints, while host bridge targets > + * one root port > + */ > + if (i == 0) > + cxld->interleave_ways = 2; > + else > + cxld->interleave_ways = 1; > + cxld->interleave_granularity = 256; > + cxld->hpa_range = (struct range) { > + .start = base, > + .end = base + size - 1, > + }; > + put_device(dev); > + } > +} > + > static int mock_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm) > { > struct cxl_port *port = cxlhdm->port; > @@ -748,16 +884,7 @@ static int mock_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm) > cxld = &cxled->cxld; > } > > - cxld->hpa_range = (struct range) { > - .start = 0, > - .end = -1, > - }; > - > - cxld->interleave_ways = min_not_zero(target_count, 1); > - cxld->interleave_granularity = SZ_4K; > - cxld->target_type = CXL_DECODER_EXPANDER; > - cxld->commit = mock_decoder_commit; > - cxld->reset = mock_decoder_reset; > + mock_init_hdm_decoder(cxld); > > if (target_count) { > rc = device_for_each_child(port->uport, &ctx, > >