tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master head: 469a89fd3bb73bb2eea628da2b3e0f695f80b7ce commit: a77a3ffa151b7a9b3f579203ff6b5844803acfd7 [401/3037] drm/tests: helpers: Add missing export config: loongarch-randconfig-r024-20230108 compiler: loongarch64-linux-gcc (GCC) 12.1.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=a77a3ffa151b7a9b3f579203ff6b5844803acfd7 git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git git fetch --no-tags linux-next master git checkout a77a3ffa151b7a9b3f579203ff6b5844803acfd7 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=loongarch olddefconfig COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=loongarch SHELL=/bin/bash If you fix the issue, kindly add following tag where applicable | Reported-by: kernel test robot Note: the linux-next/master HEAD 469a89fd3bb73bb2eea628da2b3e0f695f80b7ce builds fine. It may have been fixed somewhere. All errors (new ones prefixed by >>): loongarch64-linux-ld: drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.o: in function `.LVL49': >> drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c:650: undefined reference to `drm_bridge_remove' loongarch64-linux-ld: drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.o: in function `.LVL56': >> drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c:632: undefined reference to `devm_drm_of_get_bridge' loongarch64-linux-ld: drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.o: in function `.LVL58': >> drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c:640: undefined reference to `drm_bridge_add' loongarch64-linux-ld: drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.o: in function `.LVL75': >> drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c:531: undefined reference to `drm_bridge_attach' loongarch64-linux-ld: drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.o: in function `.LBE1133': >> drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c:712: undefined reference to `drm_of_get_data_lanes_count_ep' loongarch64-linux-ld: drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.o: in function `.LVL313': >> drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c:545: undefined reference to `drm_atomic_get_new_connector_for_encoder' >> loongarch64-linux-ld: drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.o:(.rodata+0x2f8): undefined reference to `drm_atomic_helper_bridge_duplicate_state' >> loongarch64-linux-ld: drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.o:(.rodata+0x300): undefined reference to `drm_atomic_helper_bridge_destroy_state' >> loongarch64-linux-ld: drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.o:(.rodata+0x320): undefined reference to `drm_atomic_helper_bridge_reset' vim +650 drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c 7a043f978ed143 Biju Das 2022-09-20 521 7a043f978ed143 Biju Das 2022-09-20 522 /* ----------------------------------------------------------------------------- 7a043f978ed143 Biju Das 2022-09-20 523 * Bridge 7a043f978ed143 Biju Das 2022-09-20 524 */ 7a043f978ed143 Biju Das 2022-09-20 525 7a043f978ed143 Biju Das 2022-09-20 526 static int rzg2l_mipi_dsi_attach(struct drm_bridge *bridge, 7a043f978ed143 Biju Das 2022-09-20 527 enum drm_bridge_attach_flags flags) 7a043f978ed143 Biju Das 2022-09-20 528 { 7a043f978ed143 Biju Das 2022-09-20 529 struct rzg2l_mipi_dsi *dsi = bridge_to_rzg2l_mipi_dsi(bridge); 7a043f978ed143 Biju Das 2022-09-20 530 7a043f978ed143 Biju Das 2022-09-20 @531 return drm_bridge_attach(bridge->encoder, dsi->next_bridge, bridge, 7a043f978ed143 Biju Das 2022-09-20 532 flags); 7a043f978ed143 Biju Das 2022-09-20 533 } 7a043f978ed143 Biju Das 2022-09-20 534 7a043f978ed143 Biju Das 2022-09-20 535 static void rzg2l_mipi_dsi_atomic_enable(struct drm_bridge *bridge, 7a043f978ed143 Biju Das 2022-09-20 536 struct drm_bridge_state *old_bridge_state) 7a043f978ed143 Biju Das 2022-09-20 537 { 7a043f978ed143 Biju Das 2022-09-20 538 struct drm_atomic_state *state = old_bridge_state->base.state; 7a043f978ed143 Biju Das 2022-09-20 539 struct rzg2l_mipi_dsi *dsi = bridge_to_rzg2l_mipi_dsi(bridge); 7a043f978ed143 Biju Das 2022-09-20 540 const struct drm_display_mode *mode; 7a043f978ed143 Biju Das 2022-09-20 541 struct drm_connector *connector; 7a043f978ed143 Biju Das 2022-09-20 542 struct drm_crtc *crtc; 7a043f978ed143 Biju Das 2022-09-20 543 int ret; 7a043f978ed143 Biju Das 2022-09-20 544 7a043f978ed143 Biju Das 2022-09-20 @545 connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder); 7a043f978ed143 Biju Das 2022-09-20 546 crtc = drm_atomic_get_new_connector_state(state, connector)->crtc; 7a043f978ed143 Biju Das 2022-09-20 547 mode = &drm_atomic_get_new_crtc_state(state, crtc)->adjusted_mode; 7a043f978ed143 Biju Das 2022-09-20 548 7a043f978ed143 Biju Das 2022-09-20 549 ret = rzg2l_mipi_dsi_startup(dsi, mode); 7a043f978ed143 Biju Das 2022-09-20 550 if (ret < 0) 7a043f978ed143 Biju Das 2022-09-20 551 return; 7a043f978ed143 Biju Das 2022-09-20 552 7a043f978ed143 Biju Das 2022-09-20 553 rzg2l_mipi_dsi_set_display_timing(dsi, mode); 7a043f978ed143 Biju Das 2022-09-20 554 7a043f978ed143 Biju Das 2022-09-20 555 ret = rzg2l_mipi_dsi_start_hs_clock(dsi); 7a043f978ed143 Biju Das 2022-09-20 556 if (ret < 0) 7a043f978ed143 Biju Das 2022-09-20 557 goto err_stop; 7a043f978ed143 Biju Das 2022-09-20 558 7a043f978ed143 Biju Das 2022-09-20 559 ret = rzg2l_mipi_dsi_start_video(dsi); 7a043f978ed143 Biju Das 2022-09-20 560 if (ret < 0) 7a043f978ed143 Biju Das 2022-09-20 561 goto err_stop_clock; 7a043f978ed143 Biju Das 2022-09-20 562 7a043f978ed143 Biju Das 2022-09-20 563 return; 7a043f978ed143 Biju Das 2022-09-20 564 7a043f978ed143 Biju Das 2022-09-20 565 err_stop_clock: 7a043f978ed143 Biju Das 2022-09-20 566 rzg2l_mipi_dsi_stop_hs_clock(dsi); 7a043f978ed143 Biju Das 2022-09-20 567 err_stop: 7a043f978ed143 Biju Das 2022-09-20 568 rzg2l_mipi_dsi_stop(dsi); 7a043f978ed143 Biju Das 2022-09-20 569 } 7a043f978ed143 Biju Das 2022-09-20 570 7a043f978ed143 Biju Das 2022-09-20 571 static void rzg2l_mipi_dsi_atomic_disable(struct drm_bridge *bridge, 7a043f978ed143 Biju Das 2022-09-20 572 struct drm_bridge_state *old_bridge_state) 7a043f978ed143 Biju Das 2022-09-20 573 { 7a043f978ed143 Biju Das 2022-09-20 574 struct rzg2l_mipi_dsi *dsi = bridge_to_rzg2l_mipi_dsi(bridge); 7a043f978ed143 Biju Das 2022-09-20 575 7a043f978ed143 Biju Das 2022-09-20 576 rzg2l_mipi_dsi_stop_video(dsi); 7a043f978ed143 Biju Das 2022-09-20 577 rzg2l_mipi_dsi_stop_hs_clock(dsi); 7a043f978ed143 Biju Das 2022-09-20 578 rzg2l_mipi_dsi_stop(dsi); 7a043f978ed143 Biju Das 2022-09-20 579 } 7a043f978ed143 Biju Das 2022-09-20 580 7a043f978ed143 Biju Das 2022-09-20 581 static enum drm_mode_status 7a043f978ed143 Biju Das 2022-09-20 582 rzg2l_mipi_dsi_bridge_mode_valid(struct drm_bridge *bridge, 7a043f978ed143 Biju Das 2022-09-20 583 const struct drm_display_info *info, 7a043f978ed143 Biju Das 2022-09-20 584 const struct drm_display_mode *mode) 7a043f978ed143 Biju Das 2022-09-20 585 { 7a043f978ed143 Biju Das 2022-09-20 586 if (mode->clock > 148500) 7a043f978ed143 Biju Das 2022-09-20 587 return MODE_CLOCK_HIGH; 7a043f978ed143 Biju Das 2022-09-20 588 7a043f978ed143 Biju Das 2022-09-20 589 return MODE_OK; 7a043f978ed143 Biju Das 2022-09-20 590 } 7a043f978ed143 Biju Das 2022-09-20 591 7a043f978ed143 Biju Das 2022-09-20 592 static const struct drm_bridge_funcs rzg2l_mipi_dsi_bridge_ops = { 7a043f978ed143 Biju Das 2022-09-20 593 .attach = rzg2l_mipi_dsi_attach, 7a043f978ed143 Biju Das 2022-09-20 594 .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, 7a043f978ed143 Biju Das 2022-09-20 595 .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, 7a043f978ed143 Biju Das 2022-09-20 596 .atomic_reset = drm_atomic_helper_bridge_reset, 7a043f978ed143 Biju Das 2022-09-20 597 .atomic_enable = rzg2l_mipi_dsi_atomic_enable, 7a043f978ed143 Biju Das 2022-09-20 598 .atomic_disable = rzg2l_mipi_dsi_atomic_disable, 7a043f978ed143 Biju Das 2022-09-20 599 .mode_valid = rzg2l_mipi_dsi_bridge_mode_valid, 7a043f978ed143 Biju Das 2022-09-20 600 }; 7a043f978ed143 Biju Das 2022-09-20 601 7a043f978ed143 Biju Das 2022-09-20 602 /* ----------------------------------------------------------------------------- 7a043f978ed143 Biju Das 2022-09-20 603 * Host setting 7a043f978ed143 Biju Das 2022-09-20 604 */ 7a043f978ed143 Biju Das 2022-09-20 605 7a043f978ed143 Biju Das 2022-09-20 606 static int rzg2l_mipi_dsi_host_attach(struct mipi_dsi_host *host, 7a043f978ed143 Biju Das 2022-09-20 607 struct mipi_dsi_device *device) 7a043f978ed143 Biju Das 2022-09-20 608 { 7a043f978ed143 Biju Das 2022-09-20 609 struct rzg2l_mipi_dsi *dsi = host_to_rzg2l_mipi_dsi(host); 7a043f978ed143 Biju Das 2022-09-20 610 int ret; 7a043f978ed143 Biju Das 2022-09-20 611 7a043f978ed143 Biju Das 2022-09-20 612 if (device->lanes > dsi->num_data_lanes) { 7a043f978ed143 Biju Das 2022-09-20 613 dev_err(dsi->dev, 7a043f978ed143 Biju Das 2022-09-20 614 "Number of lines of device (%u) exceeds host (%u)\n", 7a043f978ed143 Biju Das 2022-09-20 615 device->lanes, dsi->num_data_lanes); 7a043f978ed143 Biju Das 2022-09-20 616 return -EINVAL; 7a043f978ed143 Biju Das 2022-09-20 617 } 7a043f978ed143 Biju Das 2022-09-20 618 7a043f978ed143 Biju Das 2022-09-20 619 switch (mipi_dsi_pixel_format_to_bpp(device->format)) { 7a043f978ed143 Biju Das 2022-09-20 620 case 24: 7a043f978ed143 Biju Das 2022-09-20 621 case 18: 7a043f978ed143 Biju Das 2022-09-20 622 break; 7a043f978ed143 Biju Das 2022-09-20 623 default: 7a043f978ed143 Biju Das 2022-09-20 624 dev_err(dsi->dev, "Unsupported format 0x%04x\n", device->format); 7a043f978ed143 Biju Das 2022-09-20 625 return -EINVAL; 7a043f978ed143 Biju Das 2022-09-20 626 } 7a043f978ed143 Biju Das 2022-09-20 627 7a043f978ed143 Biju Das 2022-09-20 628 dsi->lanes = device->lanes; 7a043f978ed143 Biju Das 2022-09-20 629 dsi->format = device->format; 7a043f978ed143 Biju Das 2022-09-20 630 dsi->mode_flags = device->mode_flags; 7a043f978ed143 Biju Das 2022-09-20 631 7a043f978ed143 Biju Das 2022-09-20 @632 dsi->next_bridge = devm_drm_of_get_bridge(dsi->dev, dsi->dev->of_node, 7a043f978ed143 Biju Das 2022-09-20 633 1, 0); 7a043f978ed143 Biju Das 2022-09-20 634 if (IS_ERR(dsi->next_bridge)) { 7a043f978ed143 Biju Das 2022-09-20 635 ret = PTR_ERR(dsi->next_bridge); 7a043f978ed143 Biju Das 2022-09-20 636 dev_err(dsi->dev, "failed to get next bridge: %d\n", ret); 7a043f978ed143 Biju Das 2022-09-20 637 return ret; 7a043f978ed143 Biju Das 2022-09-20 638 } 7a043f978ed143 Biju Das 2022-09-20 639 7a043f978ed143 Biju Das 2022-09-20 @640 drm_bridge_add(&dsi->bridge); 7a043f978ed143 Biju Das 2022-09-20 641 7a043f978ed143 Biju Das 2022-09-20 642 return 0; 7a043f978ed143 Biju Das 2022-09-20 643 } 7a043f978ed143 Biju Das 2022-09-20 644 7a043f978ed143 Biju Das 2022-09-20 645 static int rzg2l_mipi_dsi_host_detach(struct mipi_dsi_host *host, 7a043f978ed143 Biju Das 2022-09-20 646 struct mipi_dsi_device *device) 7a043f978ed143 Biju Das 2022-09-20 647 { 7a043f978ed143 Biju Das 2022-09-20 648 struct rzg2l_mipi_dsi *dsi = host_to_rzg2l_mipi_dsi(host); 7a043f978ed143 Biju Das 2022-09-20 649 7a043f978ed143 Biju Das 2022-09-20 @650 drm_bridge_remove(&dsi->bridge); 7a043f978ed143 Biju Das 2022-09-20 651 7a043f978ed143 Biju Das 2022-09-20 652 return 0; 7a043f978ed143 Biju Das 2022-09-20 653 } 7a043f978ed143 Biju Das 2022-09-20 654 7a043f978ed143 Biju Das 2022-09-20 655 static const struct mipi_dsi_host_ops rzg2l_mipi_dsi_host_ops = { 7a043f978ed143 Biju Das 2022-09-20 656 .attach = rzg2l_mipi_dsi_host_attach, 7a043f978ed143 Biju Das 2022-09-20 657 .detach = rzg2l_mipi_dsi_host_detach, 7a043f978ed143 Biju Das 2022-09-20 658 }; 7a043f978ed143 Biju Das 2022-09-20 659 7a043f978ed143 Biju Das 2022-09-20 660 /* ----------------------------------------------------------------------------- 7a043f978ed143 Biju Das 2022-09-20 661 * Power Management 7a043f978ed143 Biju Das 2022-09-20 662 */ 7a043f978ed143 Biju Das 2022-09-20 663 7a043f978ed143 Biju Das 2022-09-20 664 static int __maybe_unused rzg2l_mipi_pm_runtime_suspend(struct device *dev) 7a043f978ed143 Biju Das 2022-09-20 665 { 7a043f978ed143 Biju Das 2022-09-20 666 struct rzg2l_mipi_dsi *dsi = dev_get_drvdata(dev); 7a043f978ed143 Biju Das 2022-09-20 667 7a043f978ed143 Biju Das 2022-09-20 668 reset_control_assert(dsi->prstc); 7a043f978ed143 Biju Das 2022-09-20 669 reset_control_assert(dsi->arstc); 7a043f978ed143 Biju Das 2022-09-20 670 7a043f978ed143 Biju Das 2022-09-20 671 return 0; 7a043f978ed143 Biju Das 2022-09-20 672 } 7a043f978ed143 Biju Das 2022-09-20 673 7a043f978ed143 Biju Das 2022-09-20 674 static int __maybe_unused rzg2l_mipi_pm_runtime_resume(struct device *dev) 7a043f978ed143 Biju Das 2022-09-20 675 { 7a043f978ed143 Biju Das 2022-09-20 676 struct rzg2l_mipi_dsi *dsi = dev_get_drvdata(dev); 7a043f978ed143 Biju Das 2022-09-20 677 int ret; 7a043f978ed143 Biju Das 2022-09-20 678 7a043f978ed143 Biju Das 2022-09-20 679 ret = reset_control_deassert(dsi->arstc); 7a043f978ed143 Biju Das 2022-09-20 680 if (ret < 0) 7a043f978ed143 Biju Das 2022-09-20 681 return ret; 7a043f978ed143 Biju Das 2022-09-20 682 7a043f978ed143 Biju Das 2022-09-20 683 ret = reset_control_deassert(dsi->prstc); 7a043f978ed143 Biju Das 2022-09-20 684 if (ret < 0) 7a043f978ed143 Biju Das 2022-09-20 685 reset_control_assert(dsi->arstc); 7a043f978ed143 Biju Das 2022-09-20 686 7a043f978ed143 Biju Das 2022-09-20 687 return ret; 7a043f978ed143 Biju Das 2022-09-20 688 } 7a043f978ed143 Biju Das 2022-09-20 689 7a043f978ed143 Biju Das 2022-09-20 690 static const struct dev_pm_ops rzg2l_mipi_pm_ops = { 7a043f978ed143 Biju Das 2022-09-20 691 SET_RUNTIME_PM_OPS(rzg2l_mipi_pm_runtime_suspend, rzg2l_mipi_pm_runtime_resume, NULL) 7a043f978ed143 Biju Das 2022-09-20 692 }; 7a043f978ed143 Biju Das 2022-09-20 693 7a043f978ed143 Biju Das 2022-09-20 694 /* ----------------------------------------------------------------------------- 7a043f978ed143 Biju Das 2022-09-20 695 * Probe & Remove 7a043f978ed143 Biju Das 2022-09-20 696 */ 7a043f978ed143 Biju Das 2022-09-20 697 7a043f978ed143 Biju Das 2022-09-20 698 static int rzg2l_mipi_dsi_probe(struct platform_device *pdev) 7a043f978ed143 Biju Das 2022-09-20 699 { 418bb3a69e1355 Biju Das 2022-09-20 700 unsigned int num_data_lanes; 7a043f978ed143 Biju Das 2022-09-20 701 struct rzg2l_mipi_dsi *dsi; 418bb3a69e1355 Biju Das 2022-09-20 702 u32 txsetr; 7a043f978ed143 Biju Das 2022-09-20 703 int ret; 7a043f978ed143 Biju Das 2022-09-20 704 7a043f978ed143 Biju Das 2022-09-20 705 dsi = devm_kzalloc(&pdev->dev, sizeof(*dsi), GFP_KERNEL); 7a043f978ed143 Biju Das 2022-09-20 706 if (!dsi) 7a043f978ed143 Biju Das 2022-09-20 707 return -ENOMEM; 7a043f978ed143 Biju Das 2022-09-20 708 7a043f978ed143 Biju Das 2022-09-20 709 platform_set_drvdata(pdev, dsi); 7a043f978ed143 Biju Das 2022-09-20 710 dsi->dev = &pdev->dev; 7a043f978ed143 Biju Das 2022-09-20 711 7a043f978ed143 Biju Das 2022-09-20 @712 ret = drm_of_get_data_lanes_count_ep(dsi->dev->of_node, 1, 0, 1, 4); 7a043f978ed143 Biju Das 2022-09-20 713 if (ret < 0) 7a043f978ed143 Biju Das 2022-09-20 714 return dev_err_probe(dsi->dev, ret, 7a043f978ed143 Biju Das 2022-09-20 715 "missing or invalid data-lanes property\n"); 7a043f978ed143 Biju Das 2022-09-20 716 418bb3a69e1355 Biju Das 2022-09-20 717 num_data_lanes = ret; 7a043f978ed143 Biju Das 2022-09-20 718 7a043f978ed143 Biju Das 2022-09-20 719 dsi->mmio = devm_platform_ioremap_resource(pdev, 0); 7a043f978ed143 Biju Das 2022-09-20 720 if (IS_ERR(dsi->mmio)) 7a043f978ed143 Biju Das 2022-09-20 721 return PTR_ERR(dsi->mmio); 7a043f978ed143 Biju Das 2022-09-20 722 7a043f978ed143 Biju Das 2022-09-20 723 dsi->vclk = devm_clk_get(dsi->dev, "vclk"); 7a043f978ed143 Biju Das 2022-09-20 724 if (IS_ERR(dsi->vclk)) 7a043f978ed143 Biju Das 2022-09-20 725 return PTR_ERR(dsi->vclk); 7a043f978ed143 Biju Das 2022-09-20 726 7a043f978ed143 Biju Das 2022-09-20 727 dsi->rstc = devm_reset_control_get_exclusive(dsi->dev, "rst"); 7a043f978ed143 Biju Das 2022-09-20 728 if (IS_ERR(dsi->rstc)) 7a043f978ed143 Biju Das 2022-09-20 729 return dev_err_probe(dsi->dev, PTR_ERR(dsi->rstc), 7a043f978ed143 Biju Das 2022-09-20 730 "failed to get rst\n"); 7a043f978ed143 Biju Das 2022-09-20 731 7a043f978ed143 Biju Das 2022-09-20 732 dsi->arstc = devm_reset_control_get_exclusive(dsi->dev, "arst"); 7a043f978ed143 Biju Das 2022-09-20 733 if (IS_ERR(dsi->arstc)) 7a043f978ed143 Biju Das 2022-09-20 734 return dev_err_probe(&pdev->dev, PTR_ERR(dsi->arstc), 7a043f978ed143 Biju Das 2022-09-20 735 "failed to get arst\n"); 7a043f978ed143 Biju Das 2022-09-20 736 7a043f978ed143 Biju Das 2022-09-20 737 dsi->prstc = devm_reset_control_get_exclusive(dsi->dev, "prst"); 7a043f978ed143 Biju Das 2022-09-20 738 if (IS_ERR(dsi->prstc)) 7a043f978ed143 Biju Das 2022-09-20 739 return dev_err_probe(dsi->dev, PTR_ERR(dsi->prstc), 7a043f978ed143 Biju Das 2022-09-20 740 "failed to get prst\n"); 7a043f978ed143 Biju Das 2022-09-20 741 7a043f978ed143 Biju Das 2022-09-20 742 platform_set_drvdata(pdev, dsi); 7a043f978ed143 Biju Das 2022-09-20 743 7a043f978ed143 Biju Das 2022-09-20 744 pm_runtime_enable(dsi->dev); 7a043f978ed143 Biju Das 2022-09-20 745 418bb3a69e1355 Biju Das 2022-09-20 746 ret = pm_runtime_resume_and_get(dsi->dev); 418bb3a69e1355 Biju Das 2022-09-20 747 if (ret < 0) 418bb3a69e1355 Biju Das 2022-09-20 748 goto err_pm_disable; 418bb3a69e1355 Biju Das 2022-09-20 749 418bb3a69e1355 Biju Das 2022-09-20 750 /* 418bb3a69e1355 Biju Das 2022-09-20 751 * TXSETR register can be read only after DPHY init. But during probe 418bb3a69e1355 Biju Das 2022-09-20 752 * mode->clock and format are not available. So initialize DPHY with 418bb3a69e1355 Biju Das 2022-09-20 753 * timing parameters for 80Mbps. 418bb3a69e1355 Biju Das 2022-09-20 754 */ 418bb3a69e1355 Biju Das 2022-09-20 755 ret = rzg2l_mipi_dsi_dphy_init(dsi, 80000); 418bb3a69e1355 Biju Das 2022-09-20 756 if (ret < 0) 418bb3a69e1355 Biju Das 2022-09-20 757 goto err_phy; 418bb3a69e1355 Biju Das 2022-09-20 758 418bb3a69e1355 Biju Das 2022-09-20 759 txsetr = rzg2l_mipi_dsi_link_read(dsi, TXSETR); 418bb3a69e1355 Biju Das 2022-09-20 760 dsi->num_data_lanes = min(((txsetr >> 16) & 3) + 1, num_data_lanes); 418bb3a69e1355 Biju Das 2022-09-20 761 rzg2l_mipi_dsi_dphy_exit(dsi); 418bb3a69e1355 Biju Das 2022-09-20 762 pm_runtime_put(dsi->dev); 418bb3a69e1355 Biju Das 2022-09-20 763 7a043f978ed143 Biju Das 2022-09-20 764 /* Initialize the DRM bridge. */ 7a043f978ed143 Biju Das 2022-09-20 765 dsi->bridge.funcs = &rzg2l_mipi_dsi_bridge_ops; 7a043f978ed143 Biju Das 2022-09-20 766 dsi->bridge.of_node = dsi->dev->of_node; 7a043f978ed143 Biju Das 2022-09-20 767 7a043f978ed143 Biju Das 2022-09-20 768 /* Init host device */ 7a043f978ed143 Biju Das 2022-09-20 769 dsi->host.dev = dsi->dev; 7a043f978ed143 Biju Das 2022-09-20 770 dsi->host.ops = &rzg2l_mipi_dsi_host_ops; 7a043f978ed143 Biju Das 2022-09-20 771 ret = mipi_dsi_host_register(&dsi->host); 7a043f978ed143 Biju Das 2022-09-20 772 if (ret < 0) 7a043f978ed143 Biju Das 2022-09-20 773 goto err_pm_disable; 7a043f978ed143 Biju Das 2022-09-20 774 7a043f978ed143 Biju Das 2022-09-20 775 return 0; 7a043f978ed143 Biju Das 2022-09-20 776 418bb3a69e1355 Biju Das 2022-09-20 777 err_phy: 418bb3a69e1355 Biju Das 2022-09-20 778 rzg2l_mipi_dsi_dphy_exit(dsi); 418bb3a69e1355 Biju Das 2022-09-20 779 pm_runtime_put(dsi->dev); 7a043f978ed143 Biju Das 2022-09-20 780 err_pm_disable: 7a043f978ed143 Biju Das 2022-09-20 781 pm_runtime_disable(dsi->dev); 7a043f978ed143 Biju Das 2022-09-20 782 return ret; 7a043f978ed143 Biju Das 2022-09-20 783 } 7a043f978ed143 Biju Das 2022-09-20 784 :::::: The code at line 650 was first introduced by commit :::::: 7a043f978ed1433bddb088a732e9bb91501ebd76 drm: rcar-du: Add RZ/G2L DSI driver :::::: TO: Biju Das :::::: CC: Laurent Pinchart -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests