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[198.145.64.163]) by smtp.gmail.com with ESMTPSA id cx5-20020a17090afd8500b002135de3013fsm5351942pjb.32.2022.12.02.18.40.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Dec 2022 18:40:02 -0800 (PST) Date: Fri, 2 Dec 2022 18:40:02 -0800 From: Kees Cook To: Rick Edgecombe Cc: x86@kernel.org, "H . Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H . J . Lu" , Jann Horn , Jonathan Corbet , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , Weijiang Yang , "Kirill A . Shutemov" , John Allen , kcc@google.com, eranian@google.com, rppt@kernel.org, jamorris@linux.microsoft.com, dethoma@microsoft.com, akpm@linux-foundation.org, Andrew.Cooper3@citrix.com, christina.schimpe@intel.com Subject: Re: [PATCH v4 24/39] mm: Warn on shadow stack memory in wrong vma Message-ID: <202212021840.D890531@keescook> References: <20221203003606.6838-1-rick.p.edgecombe@intel.com> <20221203003606.6838-25-rick.p.edgecombe@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221203003606.6838-25-rick.p.edgecombe@intel.com> X-Rspam-User: X-Rspamd-Server: rspam02 X-Rspamd-Queue-Id: 494AB4000A X-Stat-Signature: 7j961wc8incghgfdu6c11fqyzbwarhw7 X-Spamd-Result: default: False [2.91 / 9.00]; SORBS_IRL_BL(3.00)[209.85.216.51:from]; BAYES_HAM(-2.19)[88.14%]; SUSPICIOUS_RECIPS(1.50)[]; MID_RHS_NOT_FQDN(0.50)[]; MIME_GOOD(-0.10)[text/plain]; BAD_REP_POLICIES(0.10)[]; RCVD_NO_TLS_LAST(0.10)[]; DKIM_TRACE(0.00)[chromium.org:+]; RCPT_COUNT_TWELVE(0.00)[38]; FROM_EQ_ENVFROM(0.00)[]; DMARC_POLICY_ALLOW(0.00)[chromium.org,none]; MIME_TRACE(0.00)[0:+]; TO_MATCH_ENVRCPT_SOME(0.00)[]; RCVD_COUNT_THREE(0.00)[3]; PREVIOUSLY_DELIVERED(0.00)[linux-mm@kvack.org]; R_DKIM_ALLOW(0.00)[chromium.org:s=google]; ARC_NA(0.00)[]; ARC_SIGNED(0.00)[hostedemail.com:s=arc-20220608:i=1]; FROM_HAS_DN(0.00)[]; R_SPF_ALLOW(0.00)[+ip4:209.85.128.0/17]; TO_DN_SOME(0.00)[]; TAGGED_RCPT(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[] X-HE-Tag: 1670035204-91315 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Fri, Dec 02, 2022 at 04:35:51PM -0800, Rick Edgecombe wrote: > The x86 Control-flow Enforcement Technology (CET) feature includes a new > type of memory called shadow stack. This shadow stack memory has some > unusual properties, which requires some core mm changes to function > properly. > > One sharp edge is that PTEs that are both Write=0 and Dirty=1 are > treated as shadow by the CPU, but this combination used to be created by > the kernel on x86. Previous patches have changed the kernel to now avoid > creating these PTEs unless they are for shadow stack memory. In case any > missed corners of the kernel are still creating PTEs like this for > non-shadow stack memory, and to catch any re-introductions of the logic, > warn if any shadow stack PTEs (Write=0, Dirty=1) are found in non-shadow > stack VMAs when they are being zapped. This won't catch transient cases > but should have decent coverage. It will be compiled out when shadow > stack is not configured. > > In order to check if a pte is shadow stack in core mm code, add default > implmentations for pte_shstk() and pmd_shstk(). > > Tested-by: Pengfei Xu > Tested-by: John Allen > Signed-off-by: Rick Edgecombe Reviewed-by: Kees Cook -- Kees Cook