From: "HORIGUCHI NAOYA(堀口 直也)" <naoya.horiguchi@nec.com>
To: "Luck, Tony" <tony.luck@intel.com>
Cc: Jiaqi Yan <jiaqiyan@google.com>,
Nadav Amit <nadav.amit@gmail.com>,
"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
David Hildenbrand <david@redhat.com>,
"Aktas, Erdem" <erdemaktas@google.com>,
"pgonda@google.com" <pgonda@google.com>,
"rientjes@google.com" <rientjes@google.com>,
"Hsiao, Duen-wen" <duenwen@google.com>,
"Vilas.Sridharan@amd.com" <Vilas.Sridharan@amd.com>,
"Malvestuto, Mike" <mike.malvestuto@intel.com>,
"gthelen@google.com" <gthelen@google.com>,
"linux-mm@kvack.org" <linux-mm@kvack.org>,
"jthoughton@google.com" <jthoughton@google.com>
Subject: Re: [RFC] Kernel Support of Memory Error Detection.
Date: Wed, 9 Nov 2022 05:04:41 +0000 [thread overview]
Message-ID: <20221109050425.GA527418@hori.linux.bs1.fc.nec.co.jp> (raw)
In-Reply-To: <SJ1PR11MB6083BF93E9A88E659CED5EC4FC3F9@SJ1PR11MB6083.namprd11.prod.outlook.com>
On Tue, Nov 08, 2022 at 04:17:06PM +0000, Luck, Tony wrote:
> > If it is feasible in future that hardware vendors can make patrol
> > scrubber programmable, we can even direct the scanning to patrol
> > scrubber.
>
> There was an attempt to create an ACPI interface for this. I don't know if it made
> it into the standard.
I briefly checked the latest ACPI spec, and it seems that some interfaces
to control (h/w based) patrol scrubbing are defined.
https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html#acpi-ras-feature-table-rasf
> I didn't do anything with it for Linux because the interface was
> quite complex.
>
> From a h/w perspective it might always be complex. Consecutive system physical
> addresses are generally interleaved across multiple memory controllers, channels,
> DIMMs and ranks. While patrol scrubbing may be done by each memory controller
> at the channel level.
>
> So a simple request to scan a few megabytes of system physical address would
> require address translation to figure out the channel addresses on each of the
> memory controllers and programming each to scan the pieces they contribute to
> the target range.
I expect that the physical address visible to the kernel is transparently
translated to the real address in which DIMM in which channel.
- Naoya Horiguchi
next prev parent reply other threads:[~2022-11-09 5:05 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-03 15:50 Jiaqi Yan
2022-11-03 16:27 ` Luck, Tony
2022-11-03 16:40 ` Nadav Amit
2022-11-08 2:24 ` Jiaqi Yan
2022-11-08 16:17 ` Luck, Tony
2022-11-09 5:04 ` HORIGUCHI NAOYA(堀口 直也) [this message]
2022-11-10 20:23 ` Jiaqi Yan
2022-11-18 1:19 ` Jiaqi Yan
2022-11-18 14:38 ` Sridharan, Vilas
2022-11-18 17:10 ` Luck, Tony
2022-11-07 16:59 ` Sridharan, Vilas
2022-11-09 5:29 ` HORIGUCHI NAOYA(堀口 直也)
2022-11-09 16:15 ` Luck, Tony
2022-11-10 20:25 ` Jiaqi Yan
2022-11-10 20:23 ` Jiaqi Yan
2022-11-30 5:31 ` David Rientjes
2022-12-13 9:27 ` HORIGUCHI NAOYA(堀口 直也)
2022-12-13 18:09 ` Luck, Tony
2022-12-13 19:03 ` Jiaqi Yan
2022-12-14 14:45 ` Yazen Ghannam
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