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From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
To: Ashok Raj <ashok.raj@intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>,
	Andy Lutomirski <luto@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	x86@kernel.org, Kostya Serebryany <kcc@google.com>,
	Andrey Ryabinin <ryabinin.a.a@gmail.com>,
	Andrey Konovalov <andreyknvl@gmail.com>,
	Alexander Potapenko <glider@google.com>,
	Taras Madan <tarasmadan@google.com>,
	Dmitry Vyukov <dvyukov@google.com>,
	"H . J . Lu" <hjl.tools@gmail.com>,
	Andi Kleen <ak@linux.intel.com>,
	Rick Edgecombe <rick.p.edgecombe@intel.com>,
	Bharata B Rao <bharata@amd.com>,
	Jacob Pan <jacob.jun.pan@linux.intel.com>,
	linux-mm@kvack.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCHv10 10/15] x86/mm, iommu/sva: Make LAM and SVM mutually exclusive
Date: Wed, 19 Oct 2022 01:35:37 +0300	[thread overview]
Message-ID: <20221018223537.7bmhuknclkboqgnk@box.shutemov.name> (raw)
In-Reply-To: <Y08HgXqvNSpTUgWe@a4bf019067fa.jf.intel.com>

On Tue, Oct 18, 2022 at 01:07:29PM -0700, Ashok Raj wrote:
> On Tue, Oct 18, 2022 at 02:33:53PM +0300, Kirill A. Shutemov wrote:
> > IOMMU and SVM-capable devices know nothing about LAM and only expect
> > canonical addresses. Attempt to pass down tagged pointer will lead to
> > address translation failure.
> > 
> > By default do not allow to enable both LAM and use SVM in the same
> > process.
> > 
> > The new ARCH_FORCE_TAGGED_SVM arch_prctl() overrides the limitation.
> > By using the arch_prctl() userspace takes responsibility to never pass
> > tagged address to the device.
> 
> Reviewed-by: Ashok Raj <ashok.raj@intel.com>

Thanks!

> > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> > ---
> >  arch/x86/include/asm/mmu.h         |  6 ++++--
> >  arch/x86/include/asm/mmu_context.h |  2 ++
> >  arch/x86/include/uapi/asm/prctl.h  |  1 +
> >  arch/x86/kernel/process_64.c       | 13 +++++++++++++
> >  drivers/iommu/iommu-sva-lib.c      | 12 ++++++++++++
> >  include/linux/mmu_context.h        |  4 ++++
> >  6 files changed, 36 insertions(+), 2 deletions(-)
> > 
> > diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h
> > index 2fdb390040b5..cce9b32b0d6d 100644
> > --- a/arch/x86/include/asm/mmu.h
> > +++ b/arch/x86/include/asm/mmu.h
> > @@ -9,9 +9,11 @@
> >  #include <linux/bits.h>
> >  
> >  /* Uprobes on this MM assume 32-bit code */
> > -#define MM_CONTEXT_UPROBE_IA32	BIT(0)
> > +#define MM_CONTEXT_UPROBE_IA32		BIT(0)
> >  /* vsyscall page is accessible on this MM */
> > -#define MM_CONTEXT_HAS_VSYSCALL	BIT(1)
> > +#define MM_CONTEXT_HAS_VSYSCALL		BIT(1)
> 
> Nit: Looks like the two above format changes got in here :-)

That's side effect of keeping the new longer flag aligned to the rest.

A separate patch looks like an overkill, no?

-- 
  Kiryl Shutsemau / Kirill A. Shutemov


  reply	other threads:[~2022-10-18 22:35 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-18 11:33 [PATCHv10 00/15] Linear Address Masking enabling Kirill A. Shutemov
2022-10-18 11:33 ` [PATCHv10 01/15] x86/mm: Fix CR3_ADDR_MASK Kirill A. Shutemov
2022-10-18 11:33 ` [PATCHv10 02/15] x86: CPUID and CR3/CR4 flags for Linear Address Masking Kirill A. Shutemov
2022-10-18 11:33 ` [PATCHv10 03/15] mm: Pass down mm_struct to untagged_addr() Kirill A. Shutemov
2022-10-18 11:33 ` [PATCHv10 04/15] x86/mm: Handle LAM on context switch Kirill A. Shutemov
2022-10-18 11:33 ` [PATCHv10 05/15] x86/uaccess: Provide untagged_addr() and remove tags before address check Kirill A. Shutemov
2022-10-18 11:33 ` [PATCHv10 06/15] KVM: Serialize tagged address check against tagging enabling Kirill A. Shutemov
2022-10-18 11:33 ` [PATCHv10 07/15] x86/mm: Provide arch_prctl() interface for LAM Kirill A. Shutemov
2022-10-18 11:33 ` [PATCHv10 08/15] x86/mm: Reduce untagged_addr() overhead until the first LAM user Kirill A. Shutemov
2022-10-18 11:33 ` [PATCHv10 09/15] x86: Expose untagging mask in /proc/$PID/arch_status Kirill A. Shutemov
2022-10-18 21:02   ` Dave Hansen
2022-10-18 22:24     ` Kirill A. Shutemov
2022-10-18 22:41       ` Dave Hansen
2022-10-18 11:33 ` [PATCHv10 10/15] x86/mm, iommu/sva: Make LAM and SVM mutually exclusive Kirill A. Shutemov
2022-10-18 20:07   ` Ashok Raj
2022-10-18 22:35     ` Kirill A. Shutemov [this message]
2022-10-18 23:59       ` Ashok Raj
2022-10-18 21:00   ` Dave Hansen
2022-10-18 22:33     ` Kirill A. Shutemov
2022-10-18 22:43       ` Dave Hansen
2022-10-19  0:17         ` Kirill A. Shutemov
2022-10-19  7:04   ` Vasant Hegde
2022-10-18 11:33 ` [PATCHv10 11/15] selftests/x86/lam: Add malloc and tag-bits test cases for linear-address masking Kirill A. Shutemov
2022-10-18 11:33 ` [PATCHv10 12/15] selftests/x86/lam: Add mmap and SYSCALL " Kirill A. Shutemov
2022-10-18 11:33 ` [PATCHv10 13/15] selftests/x86/lam: Add io_uring " Kirill A. Shutemov
2022-10-18 11:33 ` [PATCHv10 14/15] selftests/x86/lam: Add inherit " Kirill A. Shutemov
2022-10-18 11:33 ` [PATCHv10 15/15] selftests/x86/lam: Add ARCH_FORCE_TAGGED_SVM " Kirill A. Shutemov

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