From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE47CC32771 for ; Wed, 21 Sep 2022 21:48:40 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 7071594000B; Wed, 21 Sep 2022 17:48:40 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 6B77A940008; Wed, 21 Sep 2022 17:48:40 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 5313294000B; Wed, 21 Sep 2022 17:48:40 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0016.hostedemail.com [216.40.44.16]) by kanga.kvack.org (Postfix) with ESMTP id 46CDF940008 for ; Wed, 21 Sep 2022 17:48:40 -0400 (EDT) Received: from smtpin11.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay04.hostedemail.com (Postfix) with ESMTP id 1F2911A045B for ; Wed, 21 Sep 2022 21:48:40 +0000 (UTC) X-FDA: 79937432400.11.F9DB31D Received: from mail-pj1-f52.google.com (mail-pj1-f52.google.com [209.85.216.52]) by imf04.hostedemail.com (Postfix) with ESMTP id C250740007 for ; Wed, 21 Sep 2022 21:48:39 +0000 (UTC) Received: by mail-pj1-f52.google.com with SMTP id p1-20020a17090a2d8100b0020040a3f75eso159354pjd.4 for ; Wed, 21 Sep 2022 14:48:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=LT61xLA3xO8Cm0mngS+B9eObitluLVCYOP6BvnQtjLU=; b=KTbyz47q38rOvNH4MaSFOrps1Y9zCXQ6Q5/53AoIJm1skkxgugSIuwlert/lAleh50 KvK8X42g6WNWey323t+KIBlDGBSiX+NAfIP5aAUfONFStURjNCuR33L1g1krNqS8f9KO IJp19kSHkgX78HqozbEi+07FKRDe3HS0DEb6wmgKKIJT5hQrnS34T7kP7VwkOZNUq3wg NvsuP3vWYb4dbYHcCDkRQ/hZG87FqeSM3JfnpkntZ5bbBEKDYYEqp+9tvRUWY0tQQ7qT UtgVhD8d2FYBmISbFP22uUgEi2cTPvHDeSXzFyQpKxIcvqP0GYDLJWQJrK1/1DPv+tHa WrTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=LT61xLA3xO8Cm0mngS+B9eObitluLVCYOP6BvnQtjLU=; b=ZW7YkvYGHRQzhNqWQz56igNF269HayLjxvCWNFMSSz+ozZ2ePk45Cs+mlV2JrWWyyP cXYJ6NR9h4py7ik+PTaCPGxH84FrPHmc52L1MRPsLlX7vcbRr9VKFGmD/oYfBzfF4Nrq 8FS5Ti3jFL95AWr2XJGV6zCxj31Jj+gG8Y1wcdVf5Rrjkqjef8zpiLgyhLltzQrzaThq iBI7AEl2afojsV/6/GaR63YBM3uHpgxsMs6au9JF45Gp7HcKNgJKpxkhaZM5xWDVPuuC YulQmnW0SauGbrw2SdbCUlW/A5pzbpsaZURSZjHaXNvoN7TqoSzuTwObonV7yyy/Eqor Iowg== X-Gm-Message-State: ACrzQf2OImLJDX89/HUBtzBtktVvbXa7sUMQOzdimKMoTvPfNIc+WJ+H nzgWQibXK9JOz5S1zUDur8P9hA== X-Google-Smtp-Source: AMsMyM5g1Fe8zKJclCNS+r/j90c9oB56KnFADvTXlJfEuvTn9wcw9ZCKUbfSp58YveUPRAHaiZp9fA== X-Received: by 2002:a17:902:e383:b0:176:9ee2:e099 with SMTP id g3-20020a170902e38300b001769ee2e099mr270156ple.44.1663796918852; Wed, 21 Sep 2022 14:48:38 -0700 (PDT) Received: from stillson.ba.rivosinc.com ([66.220.2.162]) by smtp.gmail.com with ESMTPSA id k7-20020aa79727000000b005484d133127sm2634536pfg.129.2022.09.21.14.48.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Sep 2022 14:48:38 -0700 (PDT) From: Chris Stillson To: Cc: Guo Ren , Vincent Chen , Han-Kuan Chen , Greentime Hu , Palmer Dabbelt , Paul Walmsley , Palmer Dabbelt , Albert Ou , Eric Biederman , Kees Cook , Anup Patel , Atish Patra , Oleg Nesterov , Heinrich Schuchardt , Guo Ren , Chris Stillson , Mayuresh Chitale , Paolo Bonzini , Alexandre Ghiti , Qinglin Pan , Arnd Bergmann , Heiko Stuebner , Jisheng Zhang , Dao Lu , "Peter Zijlstra (Intel)" , Sunil V L , Ruinland Tsai , Li Zhengyu , Alexander Graf , Ard Biesheuvel , Tsukasa OI , Yury Norov , Nicolas Saenz Julienne , Mark Rutland , Frederic Weisbecker , Changbin Du , Vitaly Wool , Myrtle Shah , Catalin Marinas , Will Deacon , Mark Brown , Alexey Dobriyan , Huacai Chen , Janosch Frank , Christian Brauner , Peter Collingbourne , Eugene Syromiatnikov , Colin Cross , Andrew Morton , Barret Rhoden , Suren Baghdasaryan , Davidlohr Bueso , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: [PATCH v12 06/17] riscv: Reset vector register Date: Wed, 21 Sep 2022 14:43:48 -0700 Message-Id: <20220921214439.1491510-6-stillson@rivosinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220921214439.1491510-1-stillson@rivosinc.com> References: <20220921214439.1491510-1-stillson@rivosinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit ARC-Authentication-Results: i=1; imf04.hostedemail.com; dkim=pass header.d=rivosinc-com.20210112.gappssmtp.com header.s=20210112 header.b=KTbyz47q; dmarc=none; spf=pass (imf04.hostedemail.com: domain of stillson@rivosinc.com designates 209.85.216.52 as permitted sender) smtp.mailfrom=stillson@rivosinc.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1663796919; a=rsa-sha256; cv=none; b=gcwyafhZH20lPjZTIgiOK2JCI0x3rzFqVOLf6SP2UpKoKCDY66n5PfFd4LSMHZgy7kEshX 0K/A0X+QMjAmEVlsr2JtoEGTiqk6DHLxEG1bQeVN2HVgOT/WnFxgRQmKt46VI+hnuDcwHK MOf4KL47pYb90/vRDvxh7VHtUdFaurk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1663796919; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=LT61xLA3xO8Cm0mngS+B9eObitluLVCYOP6BvnQtjLU=; b=ian7X8HAlC7JrBSedm6QTR5fUI7AAAGDuOvFz4jd7jXIo5zPSZ7sf+hOqTmLdtd3LPrTzI OLiuOGHXkcDkmBhgxSb1pVdIKX7jNLBt9quxBFV8au4iw64qD+KWL6EEpW6v22Nf1yuWVv UOmtY5TPwWmKWpV8UY+2LmduVq6p9JU= Authentication-Results: imf04.hostedemail.com; dkim=pass header.d=rivosinc-com.20210112.gappssmtp.com header.s=20210112 header.b=KTbyz47q; dmarc=none; spf=pass (imf04.hostedemail.com: domain of stillson@rivosinc.com designates 209.85.216.52 as permitted sender) smtp.mailfrom=stillson@rivosinc.com X-Rspamd-Server: rspam06 X-Stat-Signature: 8xhjqiem7c7f6u3apgpcg9txguzwu7s4 X-Rspam-User: X-Rspamd-Queue-Id: C250740007 X-HE-Tag: 1663796919-468930 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: From: Guo Ren Reset vector registers at boot-time and disable vector instructions execution for kernel mode. Signed-off-by: Guo Ren Co-developed-by: Vincent Chen Signed-off-by: Vincent Chen Co-developed-by: Han-Kuan Chen Signed-off-by: Han-Kuan Chen Co-developed-by: Greentime Hu Signed-off-by: Greentime Hu Reviewed-by: Palmer Dabbelt --- arch/riscv/kernel/entry.S | 6 +++--- arch/riscv/kernel/head.S | 35 +++++++++++++++++++++++++++++------ 2 files changed, 32 insertions(+), 9 deletions(-) diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index b9eda3fcbd6d..1e9987376591 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -77,10 +77,10 @@ _save_context: * Disable user-mode memory access as it should only be set in the * actual user copy routines. * - * Disable the FPU to detect illegal usage of floating point in kernel - * space. + * Disable the FPU/Vector to detect illegal usage of floating point + * or vector in kernel space. */ - li t0, SR_SUM | SR_FS + li t0, SR_SUM | SR_FS | SR_VS REG_L s0, TASK_TI_USER_SP(tp) csrrc s1, CSR_STATUS, t0 diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index b865046e4dbb..2c81ca42ec4e 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -140,10 +140,10 @@ secondary_start_sbi: .option pop /* - * Disable FPU to detect illegal usage of - * floating point in kernel space + * Disable FPU & VECTOR to detect illegal usage of + * floating point or vector in kernel space */ - li t0, SR_FS + li t0, SR_FS | SR_VS csrc CSR_STATUS, t0 /* Set trap vector to spin forever to help debug */ @@ -234,10 +234,10 @@ pmp_done: .option pop /* - * Disable FPU to detect illegal usage of - * floating point in kernel space + * Disable FPU & VECTOR to detect illegal usage of + * floating point or vector in kernel space */ - li t0, SR_FS + li t0, SR_FS | SR_VS csrc CSR_STATUS, t0 #ifdef CONFIG_RISCV_BOOT_SPINWAIT @@ -431,6 +431,29 @@ ENTRY(reset_regs) csrw fcsr, 0 /* note that the caller must clear SR_FS */ #endif /* CONFIG_FPU */ + +#ifdef CONFIG_VECTOR + csrr t0, CSR_MISA + li t1, COMPAT_HWCAP_ISA_V + and t0, t0, t1 + beqz t0, .Lreset_regs_done + + /* + * Clear vector registers and reset vcsr + * VLMAX has a defined value, VLEN is a constant, + * and this form of vsetvli is defined to set vl to VLMAX. + */ + li t1, SR_VS + csrs CSR_STATUS, t1 + csrs CSR_VCSR, x0 + vsetvli t1, x0, e8, m8, ta, ma + vmv.v.i v0, 0 + vmv.v.i v8, 0 + vmv.v.i v16, 0 + vmv.v.i v24, 0 + /* note that the caller must clear SR_VS */ +#endif /* CONFIG_VECTOR */ + .Lreset_regs_done: ret END(reset_regs) -- 2.25.1