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Shutemov" , Jacob Pan , Ashok Raj , "Kirill A. Shutemov" , Ashok Raj , Dave Hansen , Andy Lutomirski , Peter Zijlstra , x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Joerg Roedel , jacob.jun.pan@linux.intel.com Subject: Re: [PATCHv8 00/11] Linear Address Masking enabling Message-ID: <20220920134430.20111b7f@jacob-builder> In-Reply-To: References: <20220914151818.uupzpyd333qnnmlt@box.shutemov.name> <20220914154532.mmxfsr7eadgnxt3s@box.shutemov.name> <20220914165116.24f82d74@jacob-builder> <20220915090135.fpeokbokkdljv7rw@box.shutemov.name> <20220915172858.pl62a5w3m5binxrk@box.shutemov.name> <15741fdf-68b6-bd32-b0c2-63fde3bb0db2@intel.com> <20220920113742.277ac497@jacob-builder> Organization: OTC X-Mailer: Claws Mail 3.17.5 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1663706465; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=IbuTI3CXy+agQwwLwFgCyJrkV3uYOjmQJMybeZGQxFg=; b=SW1r5ZpvNPHo+EUdzU9JRDKs4j4JLMuL+UtLfY/5EwfGTsqvwUFU6p25lQ+OPzTdPyBkQ+ 9Puz/BSY5TNiWMNc3ONYzx6xEHzXsi1MaiG2WmS1IoWx1D/9oW483Fi5UhROutyzAYyHek sFrcenvuVjK1Z7nuXz1gxyUVpXTMPaU= ARC-Authentication-Results: i=1; imf26.hostedemail.com; dkim=none ("invalid DKIM record") header.d=intel.com header.s=Intel header.b=FZqXL2HJ; dmarc=fail reason="No valid SPF" header.from=intel.com (policy=none); spf=none (imf26.hostedemail.com: domain of jacob.jun.pan@linux.intel.com has no SPF policy when checking 134.134.136.24) smtp.mailfrom=jacob.jun.pan@linux.intel.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1663706465; a=rsa-sha256; cv=none; b=3mBKVhmwgP8rezvz2AGQmZ7V91Kr+0NT1lrKOp36m8MSSbSAxlOil1A/kL4JXR07SvLj3i D/IVRMJkLQaSyyORiPfTIAmpY4GRcxcakC9JFvnortvi6UUKzDKSmJ8HH9B5ayVbu/i6vn aZgfCHbzrOKZr3GBPFoK/OeL7ZH8qs0= Authentication-Results: imf26.hostedemail.com; dkim=none ("invalid DKIM record") header.d=intel.com header.s=Intel header.b=FZqXL2HJ; dmarc=fail reason="No valid SPF" header.from=intel.com (policy=none); spf=none (imf26.hostedemail.com: domain of jacob.jun.pan@linux.intel.com has no SPF policy when checking 134.134.136.24) smtp.mailfrom=jacob.jun.pan@linux.intel.com X-Rspam-User: X-Rspamd-Server: rspam01 X-Stat-Signature: oqgpr5pgcihroh6kj4g7cirgho8wkopx X-Rspamd-Queue-Id: 7A51014000F X-HE-Tag: 1663706464-443267 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Hi Jason, On Tue, 20 Sep 2022 15:50:33 -0300, Jason Gunthorpe wrote: > On Tue, Sep 20, 2022 at 11:41:04AM -0700, Jacob Pan wrote: > > Hi Jason, > > > > On Tue, 20 Sep 2022 13:27:27 -0300, Jason Gunthorpe > > wrote: > > > On Tue, Sep 20, 2022 at 09:06:32AM -0700, Dave Hansen wrote: > > > > On 9/20/22 06:14, Jason Gunthorpe wrote: > > > > > For this I would rather have a function that queries the format > > > > > of the page table under the mm_struct and we have enum values like > > > > > INTEL_NORMAL and INTEL_LAM as possible values. > > > > > > > > > > The iommu driver will block incompatible page table formats, and > > > > > when it starts up it should assert something that blocks changing > > > > > the format. > > > > > > > > That doesn't sound too bad. Except, please don't call it a "page > > > > table format". The format of the page tables does not change with > > > > LAM. It's entirely how the CPU interprets addresses that changes. > > > > > > > > > > Sure it does. The rules for how the page table is walked change. The > > > actual bits stored in memory might not be different, but that doesn't > > > mean the format didn't change. If it didn't change we wouldn't have an > > > incompatibility with the IOMMU HW walker. > > > > There are many CPU-IOMMU compatibility checks before we do for SVA,e.g. > > we check paging mode in sva_bind. We are delegating these checks in > > arch/platform code. So why can't we let arch code decide how to convey > > mm-IOMMU SVA compatibility? let it be a flag ( as in this patch) or some > > callback. > > In general I'm not so keen on arch unique code for general ideas like > this (ARM probably has the same issue), but sure it could work. > Creating an abstraction seems to belong to a separate endeavor when we have more than one user. For now, are you ok with the current approach? > > Perhaps a more descriptive name > > s/arch_can_alloc_pasid(mm)/arch_can_support_sva(mm)/ is all we > > disagreeing :) > > Except that still isn't what it is doing. "sva" can mean lots of > things. True, but sharing page table is the root cause of the incompatibility. IMHO, SVA means sharing page table at the highest level. > You need to assert that the page table format is one of the > formats that the iommu understands and configure the iommu to match > it. It is a very simple question about what ruleset and memory layout > govern the page table memory used by the CPU. the problem is more relevant to things like canonical address requirement than page table format. > And I think every CPU should be able to define a couple of their > configurations in some enum, most of the PTE handling code is all > hardwired, so I don't think we really support that many combinations > anyhow? sounds like a nice but separate effort, I don't know enough here. Thanks, Jacob