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Shutemov" Cc: "Kirill A. Shutemov" , Ashok Raj , Dave Hansen , Andy Lutomirski , "Peter Zijlstra" , , Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , , , Ashok Raj , jacob.jun.pan@intel.com Subject: Re: [PATCHv8 00/11] Linear Address Masking enabling Message-ID: <20220912170809.101fa976@jacob-builder> In-Reply-To: <20220912224930.ukakmmwumchyacqc@box.shutemov.name> References: <20220830010104.1282-1-kirill.shutemov@linux.intel.com> <20220904003952.fheisiloilxh3mpo@box.shutemov.name> <20220912224930.ukakmmwumchyacqc@box.shutemov.name> Organization: OTC X-Mailer: Claws Mail 3.17.5 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1663027496; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=deOufLO3efcWRFQxnpZd2eRTSPtNhIcIsgcaWQTPh+o=; b=rUyA7+6EzbvoSkz8mdZ/Tlokksyr7N2DVx92IrF3Bci3QpHkab4EE93lVp7LPePdu0sL/g FuKwqs0mIN0mIqVR6lFZ+VV7luEShIV4DmHTMjOAB9W4MX77zK48SxJEzMhW4l+c1NqQNv I90gkR9d9bqpQj0Vacm+YKdO8wGNXu0= ARC-Authentication-Results: i=1; imf29.hostedemail.com; dkim=none ("invalid DKIM record") header.d=intel.com header.s=Intel header.b=VZmiwMgS; spf=pass (imf29.hostedemail.com: domain of jacob.jun.pan@intel.com designates 134.134.136.126 as permitted sender) smtp.mailfrom=jacob.jun.pan@intel.com; dmarc=pass (policy=none) header.from=intel.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1663027496; a=rsa-sha256; cv=none; b=21pbVJIkamOS9SAUC5ogCuSgCAMHQdC3VlhNHdkdIkuM0912HnkbolGrDbc8MCkID21x9p k0ls2tqc72GbLOo5kLTIvuoRVuIt2AJzKJi98Dg7J4v07MBQHIBeAyfwBmoV8yvMW3JXuL PoIkqdgqPzSBsJp5GNUo2/S5gKpoE8o= X-Rspam-User: X-Stat-Signature: rg7i1rw9carmrfo73iqa1wuq7h1wiukf X-Rspamd-Queue-Id: 43BE21200D1 Authentication-Results: imf29.hostedemail.com; dkim=none ("invalid DKIM record") header.d=intel.com header.s=Intel header.b=VZmiwMgS; spf=pass (imf29.hostedemail.com: domain of jacob.jun.pan@intel.com designates 134.134.136.126 as permitted sender) smtp.mailfrom=jacob.jun.pan@intel.com; dmarc=pass (policy=none) header.from=intel.com X-Rspamd-Server: rspam08 X-HE-Tag: 1663027496-678103 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Hi Kirill, On Tue, 13 Sep 2022 01:49:30 +0300, "Kirill A. Shutemov" wrote: > On Sun, Sep 04, 2022 at 03:39:52AM +0300, Kirill A. Shutemov wrote: > > On Thu, Sep 01, 2022 at 05:45:08PM +0000, Ashok Raj wrote: > > > Hi Kirill, > > > > > > On Tue, Aug 30, 2022 at 04:00:53AM +0300, Kirill A. Shutemov wrote: > > > > Linear Address Masking[1] (LAM) modifies the checking that is > > > > applied to 64-bit linear addresses, allowing software to use of the > > > > untranslated address bits for metadata. > > > > > > We discussed this internally, but didn't bubble up here. > > > > > > Given that we are working on enabling Shared Virtual Addressing (SVA) > > > within the IOMMU. This permits user to share VA directly with the > > > device, and the device can participate even in fixing page-faults and > > > such. > > > > > > IOMMU enforces canonical addressing, since we are hijacking the top > > > order bits for meta-data, it will fail sanity check and we would > > > return a failure back to device on any page-faults from device. > > > > > > It also complicates how device TLB and ATS work, and needs some major > > > improvements to detect device capability to accept tagged pointers, > > > adjust the devtlb to act accordingly. > > > > > > > > > Both are orthogonal features, but there is an intersection of both > > > that are fundamentally incompatible. > > > > > > Its even more important, since an application might be using SVA > > > under the cover provided by some library that's used without their > > > knowledge. > > > > > > The path would be: > > > > > > 1. Ensure both LAM and SVM are incompatible by design, without major > > > changes. > > > - If LAM is enabled already and later SVM enabling is > > > requested by user, that should fail. and Vice versa. > > > - Provide an API to user to ask for opt-out. Now they know > > > they must sanitize the pointers before sending to device, or the > > > working set is already isolated and needs no work. > > > > The patch below implements something like this. It is PoC, build-tested > > only. > > > > To be honest, I hate it. It is clearly a layering violation. It feels > > dirty. But I don't see any better way as we tie orthogonal features > > together. > > > > Also I have no idea how to make forced PASID allocation if LAM enabled. > > What the API has to look like? > > Jacob, Ashok, any comment on this part? > > I expect in many cases LAM will be enabled very early (like before malloc > is functinal) in process start and it makes PASID allocation always fail. > Is there a generic flag LAM can set on the mm? We can't check x86 feature in IOMMU SVA API. i.e. @@ -32,6 +33,15 @@ int iommu_sva_alloc_pasid(struct mm_struct *mm, ioasid_t min, ioasid_t max) return -EINVAL; mutex_lock(&iommu_sva_lock); + + /* Serialize against LAM enabling */ + mutex_lock(&mm->context.lock); + + if (mm_lam_cr3_mask(mm)) { + ret = -EBUSY; + goto out; + } + > Any way out? > Thanks, Jacob