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Shutemov" To: Ashok Raj Cc: "Kirill A. Shutemov" , Dave Hansen , Andy Lutomirski , Peter Zijlstra , x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Jacon Jun Pan , Ashok Raj Subject: Re: [PATCHv8 00/11] Linear Address Masking enabling Message-ID: <20220904003952.fheisiloilxh3mpo@box.shutemov.name> References: <20220830010104.1282-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: ARC-Authentication-Results: i=1; imf26.hostedemail.com; dkim=pass header.d=shutemov.name header.s=fm3 header.b=QcCki5X7; dkim=pass header.d=messagingengine.com header.s=fm1 header.b=soY9uNyE; spf=pass (imf26.hostedemail.com: domain of kirill@shutemov.name designates 64.147.123.25 as permitted sender) smtp.mailfrom=kirill@shutemov.name; dmarc=none ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1662252000; a=rsa-sha256; cv=none; b=wEVXwiDLsPjKATDqAA52lke0kZImFUDUrxgACfTgCUF09R3f/NjH6uiKXFl+pbnPhd1YJZ QbZ/uQ43dEhyDHSbPq6M6dRS2qkwiY/r9myGGglE7A2nw1Ys8IKzKG76j3vOl4fJfbY9Qn 6mzUal4IktJtFkzeqpovoLyjOqHnKgs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1662252000; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=jOiB6BRciZiGUtx6imc89hidDkCwOtUwyTVUDvZtpKY=; b=7Fx26e/FP5sRe2/oOG+JSk474HI5OYGDitM3iDk9Ezc5Qk2vngSYe8hNQf2eU+PCFCmBuc Fpip6zzRYke7eUqA7OOw2N19CKTOs3HsCevrMucDw/HyJso9b3DpFlW8WetfzXtYQ2chHp 61hWtUDk3GKHmfwAb1z1GLOvE1hia48= X-Stat-Signature: 4ei66ajysquhfmhr4rghunttrgowmior X-Rspamd-Queue-Id: 1292C140081 X-Rspam-User: Authentication-Results: imf26.hostedemail.com; dkim=pass header.d=shutemov.name header.s=fm3 header.b=QcCki5X7; dkim=pass header.d=messagingengine.com header.s=fm1 header.b=soY9uNyE; spf=pass (imf26.hostedemail.com: domain of kirill@shutemov.name designates 64.147.123.25 as permitted sender) smtp.mailfrom=kirill@shutemov.name; dmarc=none X-Rspamd-Server: rspam07 X-HE-Tag: 1662251999-276801 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Thu, Sep 01, 2022 at 05:45:08PM +0000, Ashok Raj wrote: > Hi Kirill, > > On Tue, Aug 30, 2022 at 04:00:53AM +0300, Kirill A. Shutemov wrote: > > Linear Address Masking[1] (LAM) modifies the checking that is applied to > > 64-bit linear addresses, allowing software to use of the untranslated > > address bits for metadata. > > We discussed this internally, but didn't bubble up here. > > Given that we are working on enabling Shared Virtual Addressing (SVA) > within the IOMMU. This permits user to share VA directly with the device, > and the device can participate even in fixing page-faults and such. > > IOMMU enforces canonical addressing, since we are hijacking the top order > bits for meta-data, it will fail sanity check and we would return a failure > back to device on any page-faults from device. > > It also complicates how device TLB and ATS work, and needs some major > improvements to detect device capability to accept tagged pointers, adjust > the devtlb to act accordingly. > > > Both are orthogonal features, but there is an intersection of both > that are fundamentally incompatible. > > Its even more important, since an application might be using SVA under the > cover provided by some library that's used without their knowledge. > > The path would be: > > 1. Ensure both LAM and SVM are incompatible by design, without major > changes. > - If LAM is enabled already and later SVM enabling is requested by > user, that should fail. and Vice versa. > - Provide an API to user to ask for opt-out. Now they know they > must sanitize the pointers before sending to device, or the > working set is already isolated and needs no work. The patch below implements something like this. It is PoC, build-tested only. To be honest, I hate it. It is clearly a layering violation. It feels dirty. But I don't see any better way as we tie orthogonal features together. Also I have no idea how to make forced PASID allocation if LAM enabled. What the API has to look like? Any comments? > 2. I suppose for any syscalls that take tagged pointers you would maybe > relax checks for how many bits to ignore for canonicallity. This is > required so user don't need to do the same for everything sanitization > before every syscall. I'm not quite follow this. For syscalls that allow tagged pointers, we do untagged_addr() now. Not sure what else needed. > If you have it fail, the library might choose a less optimal path if one is > available. > > Cheers, > Ashok diff --git a/arch/x86/include/uapi/asm/prctl.h b/arch/x86/include/uapi/asm/prctl.h index a31e27b95b19..e5c04ced36c9 100644 --- a/arch/x86/include/uapi/asm/prctl.h +++ b/arch/x86/include/uapi/asm/prctl.h @@ -23,5 +23,6 @@ #define ARCH_GET_UNTAG_MASK 0x4001 #define ARCH_ENABLE_TAGGED_ADDR 0x4002 #define ARCH_GET_MAX_TAG_BITS 0x4003 +#define ARCH_ENABLE_TAGGED_ADDR_FORCED 0x4004 #endif /* _ASM_X86_PRCTL_H */ diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 337f80a0862f..7d89a2fd1a55 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -774,7 +774,8 @@ static bool lam_u48_allowed(void) #define LAM_U48_BITS 15 #define LAM_U57_BITS 6 -static int prctl_enable_tagged_addr(struct mm_struct *mm, unsigned long nr_bits) +static int prctl_enable_tagged_addr(struct mm_struct *mm, unsigned long nr_bits, + bool forced) { int ret = 0; @@ -793,6 +794,11 @@ static int prctl_enable_tagged_addr(struct mm_struct *mm, unsigned long nr_bits) goto out; } + if (pasid_valid(mm->pasid) && !forced) { + ret = -EBUSY; + goto out; + } + if (!nr_bits) { ret = -EINVAL; goto out; @@ -910,7 +916,9 @@ long do_arch_prctl_64(struct task_struct *task, int option, unsigned long arg2) return put_user(task->mm->context.untag_mask, (unsigned long __user *)arg2); case ARCH_ENABLE_TAGGED_ADDR: - return prctl_enable_tagged_addr(task->mm, arg2); + return prctl_enable_tagged_addr(task->mm, arg2, false); + case ARCH_ENABLE_TAGGED_ADDR_FORCED: + return prctl_enable_tagged_addr(task->mm, arg2, true); case ARCH_GET_MAX_TAG_BITS: { int nr_bits; diff --git a/drivers/iommu/iommu-sva-lib.c b/drivers/iommu/iommu-sva-lib.c index 106506143896..a6ec17de1937 100644 --- a/drivers/iommu/iommu-sva-lib.c +++ b/drivers/iommu/iommu-sva-lib.c @@ -4,6 +4,7 @@ */ #include #include +#include #include "iommu-sva-lib.h" @@ -32,6 +33,15 @@ int iommu_sva_alloc_pasid(struct mm_struct *mm, ioasid_t min, ioasid_t max) return -EINVAL; mutex_lock(&iommu_sva_lock); + + /* Serialize against LAM enabling */ + mutex_lock(&mm->context.lock); + + if (mm_lam_cr3_mask(mm)) { + ret = -EBUSY; + goto out; + } + /* Is a PASID already associated with this mm? */ if (pasid_valid(mm->pasid)) { if (mm->pasid < min || mm->pasid >= max) @@ -45,6 +55,7 @@ int iommu_sva_alloc_pasid(struct mm_struct *mm, ioasid_t min, ioasid_t max) else mm_pasid_set(mm, pasid); out: + mutex_unlock(&mm->context.lock); mutex_unlock(&iommu_sva_lock); return ret; } -- Kiryl Shutsemau / Kirill A. Shutemov