[linux-next:master 7026/10906] drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dmub_srv.c:565:64: sparse: sparse: cast truncates bits from constant value (44 becomes 4)

[linux-next:master 7026/10906] drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dmub_srv.c:565:64: sparse: sparse: cast truncates bits from constant value (44 becomes 4)

[kernel test robot]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head:   6014cfa5bf32cf8c5c58b3cfd5ee0e1542c8a825
commit: 85f4bc0c333ceed24cbc9f69a2a77fab1ae3d4d1 [7026/10906] drm/amd/display: Add SubVP required code
config: i386-allmodconfig (https://download.01.org/0day-ci/archive/20220718/202207181730.9lxOGJy2-lkp@intel.com/config)
compiler: gcc-11 (Debian 11.3.0-3) 11.3.0
reproduce:
        # apt-get install sparse
        # sparse version: v0.6.4-39-gce1a6720-dirty
        # https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=85f4bc0c333ceed24cbc9f69a2a77fab1ae3d4d1
        git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
        git fetch --no-tags linux-next master
        git checkout 85f4bc0c333ceed24cbc9f69a2a77fab1ae3d4d1
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=i386 SHELL=/bin/bash drivers/gpu/drm/

If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>


sparse warnings: (new ones prefixed by >>)
   drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dmub_srv.c:549:6: sparse: sparse: symbol 'dc_dmub_setup_subvp_dmub_command' was not declared. Should it be static?
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dmub_srv.c:565:64: sparse: sparse: cast truncates bits from constant value (44 becomes 4)

vim +565 drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dmub_srv.c

   533	
   534	/**
   535	 * ***************************************************************************************
   536	 * dc_dmub_setup_subvp_dmub_command: Populate the DMCUB SubVP command
   537	 *
   538	 * This function loops through each pipe and populates the DMUB
   539	 * SubVP CMD info based on the pipe (e.g. SubVP, VBLANK).
   540	 *
   541	 * @param [in] dc: current dc state
   542	 * @param [in] context: new dc state
   543	 * @param [in] cmd: DMUB cmd to be populated with SubVP info
   544	 *
   545	 * @return: void
   546	 *
   547	 * ***************************************************************************************
   548	 */
   549	void dc_dmub_setup_subvp_dmub_command(struct dc *dc,
   550			struct dc_state *context,
   551			bool enable)
   552	{
   553		uint8_t cmd_pipe_index = 0;
   554		uint32_t i, pipe_idx;
   555		uint8_t subvp_count = 0;
   556		union dmub_rb_cmd cmd;
   557		struct pipe_ctx *subvp_pipes[2];
   558		uint32_t wm_val_refclk = 0;
   559	
   560		memset(&cmd, 0, sizeof(cmd));
   561		// FW command for SUBVP
   562		cmd.fw_assisted_mclk_switch_v2.header.type = DMUB_CMD__FW_ASSISTED_MCLK_SWITCH;
   563		cmd.fw_assisted_mclk_switch_v2.header.sub_type = DMUB_CMD__HANDLE_SUBVP_CMD;
   564		cmd.fw_assisted_mclk_switch_v2.header.payload_bytes =
 > 565				sizeof(cmd.fw_assisted_mclk_switch_v2) - sizeof(cmd.fw_assisted_mclk_switch_v2.header);
   566	
   567		for (i = 0; i < dc->res_pool->pipe_count; i++) {
   568			struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
   569	
   570			if (!pipe->stream)
   571				continue;
   572	
   573			if (pipe->plane_state && !pipe->top_pipe &&
   574					pipe->stream->mall_stream_config.type == SUBVP_MAIN)
   575				subvp_pipes[subvp_count++] = pipe;
   576		}
   577	
   578		if (enable) {
   579			// For each pipe that is a "main" SUBVP pipe, fill in pipe data for DMUB SUBVP cmd
   580			for (i = 0, pipe_idx = 0; i < dc->res_pool->pipe_count; i++) {
   581				struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
   582	
   583				if (!pipe->stream)
   584					continue;
   585	
   586				if (pipe->plane_state && pipe->stream->mall_stream_config.paired_stream &&
   587						pipe->stream->mall_stream_config.type == SUBVP_MAIN) {
   588					populate_subvp_cmd_pipe_info(dc, context, &cmd, pipe, cmd_pipe_index++);
   589				} else if (pipe->plane_state && pipe->stream->mall_stream_config.type == SUBVP_NONE) {
   590					// Don't need to check for ActiveDRAMClockChangeMargin < 0, not valid in cases where
   591					// we run through DML without calculating "natural" P-state support
   592					populate_subvp_cmd_vblank_pipe_info(dc, context, &cmd, pipe, cmd_pipe_index++);
   593	
   594				}
   595				pipe_idx++;
   596			}
   597			if (subvp_count == 2) {
   598				update_subvp_prefetch_end_to_mall_start(dc, context, &cmd, subvp_pipes);
   599			}
   600			cmd.fw_assisted_mclk_switch_v2.config_data.pstate_allow_width_us = dc->caps.subvp_pstate_allow_width_us;
   601			cmd.fw_assisted_mclk_switch_v2.config_data.vertical_int_margin_us = dc->caps.subvp_vertical_int_margin_us;
   602	
   603			// Store the original watermark value for this SubVP config so we can lower it when the
   604			// MCLK switch starts
   605			wm_val_refclk = context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.pstate_change_ns *
   606					dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000 / 1000;
   607	
   608			cmd.fw_assisted_mclk_switch_v2.config_data.watermark_a_cache = wm_val_refclk < 0xFFFF ? wm_val_refclk : 0xFFFF;
   609		}
   610		dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd);
   611		dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv);
   612		dc_dmub_srv_wait_idle(dc->ctx->dmub_srv);
   613	}
   614	

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