From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3888C433EF for ; Mon, 21 Mar 2022 17:44:19 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 6F36F6B0071; Mon, 21 Mar 2022 13:44:19 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 6A3576B0073; Mon, 21 Mar 2022 13:44:19 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 5436D6B0074; Mon, 21 Mar 2022 13:44:19 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (relay.hostedemail.com [64.99.140.25]) by kanga.kvack.org (Postfix) with ESMTP id 443416B0071 for ; Mon, 21 Mar 2022 13:44:19 -0400 (EDT) Received: from smtpin06.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay06.hostedemail.com (Postfix) with ESMTP id 0918823E34 for ; Mon, 21 Mar 2022 17:44:19 +0000 (UTC) X-FDA: 79269117438.06.9834A6D Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by imf05.hostedemail.com (Postfix) with ESMTP id 6E585100026 for ; Mon, 21 Mar 2022 17:44:18 +0000 (UTC) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 51F746147C; Mon, 21 Mar 2022 17:44:17 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 48FE8C340E8; Mon, 21 Mar 2022 17:44:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1647884656; bh=Cc93Sj0aRgEOWTPpRj8NNqcOtJCr+4R/IS5e+PnVDpI=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=U3fE9mvncxRxT9MkMJyY0wRxVjZfmImW2AWeVMS26K1N5AtfUrZ1VUSp/QbiO/uIR BFbccvvfaSmWp/4TrOWv/MhNpySrnD3IQq3wzid7KyDktnTbLdSYaFOJLcRZtN4o7N aDSP6nZ92OrCdbiQk8QH4DJ9LgjlQ5L1sJF3iyIWFCD3ZQtx29z+angBTrsQGIj6Kn DdRfhByEDboFK2Cl786MKfWBivB0FL5zKRy23ALcA8DH4ljl0HYRhoHyjFQ4aXHahG qSstj/taGkUf/aMOjalkyn48fWLmLB6kIOwvf2k/g0exuPW+jZpFfMOn1uJibIorNR UkF9q9okXpjRg== Date: Mon, 21 Mar 2022 17:44:05 +0000 From: Will Deacon To: David Hildenbrand Cc: Catalin Marinas , linux-kernel@vger.kernel.org, Andrew Morton , Hugh Dickins , Linus Torvalds , David Rientjes , Shakeel Butt , John Hubbard , Jason Gunthorpe , Mike Kravetz , Mike Rapoport , Yang Shi , "Kirill A . Shutemov" , Matthew Wilcox , Vlastimil Babka , Jann Horn , Michal Hocko , Nadav Amit , Rik van Riel , Roman Gushchin , Andrea Arcangeli , Peter Xu , Donald Dutile , Christoph Hellwig , Oleg Nesterov , Jan Kara , Liang Zhang , Pedro Gomes , Oded Gabbay , Michael Ellerman , Benjamin Herrenschmidt , Paul Mackerras , Heiko Carstens , Vasily Gorbik , Alexander Gordeev , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , linux-mm@kvack.org, x86@kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org Subject: Re: [PATCH v1 4/7] arm64/pgtable: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE Message-ID: <20220321174404.GA11389@willie-the-truck> References: <20220315141837.137118-1-david@redhat.com> <20220315141837.137118-5-david@redhat.com> <20220321143802.GC11145@willie-the-truck> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-Rspam-User: Authentication-Results: imf05.hostedemail.com; dkim=pass header.d=kernel.org header.s=k20201202 header.b=U3fE9mvn; dmarc=pass (policy=none) header.from=kernel.org; spf=pass (imf05.hostedemail.com: domain of will@kernel.org designates 139.178.84.217 as permitted sender) smtp.mailfrom=will@kernel.org X-Rspamd-Server: rspam09 X-Rspamd-Queue-Id: 6E585100026 X-Stat-Signature: a7bkypd5xtmpd19tsa7hw8rtx76b4z3b X-HE-Tag: 1647884658-76553 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Mon, Mar 21, 2022 at 04:07:48PM +0100, David Hildenbrand wrote: > On 21.03.22 15:38, Will Deacon wrote: > > On Wed, Mar 16, 2022 at 06:27:01PM +0000, Catalin Marinas wrote: > >> On Tue, Mar 15, 2022 at 03:18:34PM +0100, David Hildenbrand wrote: > >>> diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h > >>> index b1e1b74d993c..62e0ebeed720 100644 > >>> --- a/arch/arm64/include/asm/pgtable-prot.h > >>> +++ b/arch/arm64/include/asm/pgtable-prot.h > >>> @@ -14,6 +14,7 @@ > >>> * Software defined PTE bits definition. > >>> */ > >>> #define PTE_WRITE (PTE_DBM) /* same as DBM (51) */ > >>> +#define PTE_SWP_EXCLUSIVE (_AT(pteval_t, 1) << 2) /* only for swp ptes */ > >> > >> I think we can use bit 1 here. > >> > >>> @@ -909,12 +925,13 @@ static inline pmd_t pmdp_establish(struct vm_area_struct *vma, > >>> /* > >>> * Encode and decode a swap entry: > >>> * bits 0-1: present (must be zero) > >>> - * bits 2-7: swap type > >>> + * bits 2: remember PG_anon_exclusive > >>> + * bits 3-7: swap type > >>> * bits 8-57: swap offset > >>> * bit 58: PTE_PROT_NONE (must be zero) > >> > >> I don't remember exactly why we reserved bits 0 and 1 when, from the > >> hardware perspective, it's sufficient for bit 0 to be 0 and the whole > >> pte becomes invalid. We use bit 1 as the 'table' bit (when 0 at pmd > >> level, it's a huge page) but we shouldn't check for this on a swap > >> entry. > > > > I'm a little worried that when we're dealing with huge mappings at the > > PMD level we might lose the ability to distinguish them from a pte-level > > mapping with this new flag set if we use bit 1. A similar issue to this > > was fixed a long time ago by 59911ca4325d ("ARM64: mm: Move PTE_PROT_NONE > > bit") when we used to use bit 1 for PTE_PROT_NONE. > > > > Is something like: > > > > pmd_to_swp_entry(swp_entry_to_pmd(pmd)); > > Note that __HAVE_ARCH_PTE_SWP_EXCLUSIVE currently only applies to actual > swap entries, not non-swap entries (migration, hwpoison, ...). So it > really only applies to PTEs -- PMDs are not applicable. Right, thanks for the clarification. > So the example you gave cannot possibly have that bit set. From what I > understand, it should be fine. But I have no real preference: I can also > just stick to the original patch, whatever you prefer. I think I'd prefer to stay on the safe side and stick with bit 2 as you originally proposed. If we need to support crazy numbers of swapfiles in future then we can revisit the idea of allocating bit 1. Thanks, and sorry for the trouble. Will