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Shutemov" To: Borislav Petkov Cc: Brijesh Singh , x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , Dov Murik , Tobin Feldman-Fitzthum , Michael Roth , Vlastimil Babka , Andi Kleen , "Dr . David Alan Gilbert" , brijesh.ksingh@gmail.com, tony.luck@intel.com, marcorr@google.com, sathyanarayanan.kuppuswamy@linux.intel.com Subject: Re: [PATCH v10 21/45] x86/mm: Add support to validate memory when changing C-bit Message-ID: <20220215124331.i4vgww733fv5owrx@box.shutemov.name> References: <20220209181039.1262882-1-brijesh.singh@amd.com> <20220209181039.1262882-22-brijesh.singh@amd.com> <0242e383-5406-7504-ff3d-cf2e8dfaf8a3@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Stat-Signature: 8kjggizmbyzy4kyx57em9xtag7r186ba X-Rspamd-Server: rspam02 X-Rspamd-Queue-Id: 95D1F40006 Authentication-Results: imf04.hostedemail.com; dkim=pass header.d=shutemov-name.20210112.gappssmtp.com header.s=20210112 header.b=uJNVxw9r; dmarc=none; spf=none (imf04.hostedemail.com: domain of kirill@shutemov.name has no SPF policy when checking 209.85.167.52) smtp.mailfrom=kirill@shutemov.name X-Rspam-User: X-HE-Tag: 1644928960-670486 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Sun, Feb 13, 2022 at 01:15:23PM +0100, Borislav Petkov wrote: > On Fri, Feb 11, 2022 at 11:27:54AM -0600, Brijesh Singh wrote: > > > Simply have them always present. They will have !0 values on the > > > respective guest types and 0 otherwise. This should simplify a lot of > > > code and another unconditionally present u64 won't be the end of the > > > world. > > > > > > Any other aspect I'm missing? > > > > I think that's mostly about it. IIUC, the recommendation is to define a > > new callback in x86_platform_op. The callback will be invoked > > unconditionally; The default implementation for this callback is NOP; > > The TDX and SEV will override with the platform specific implementation. > > I think we may able to handle everything in one callback hook but having > > pre and post will be a more desirable. Here is why I am thinking so: > > > > * On SNP, the page must be invalidated before clearing the _PAGE_ENC > > from the page table attribute > > > > * On SNP, the page must be validated after setting the _PAGE_ENC in the > > page table attribute. > > Right, we could have a pre- and post- callback, if that would make > things simpler/clearer. > > Also, in thinking further about the encryption mask, we could make it a > *single*, *global* variable called cc_mask which each guest type sets it > as it wants to. I don't think it works. TDX and SME/SEV has opposite polarity of the mask. SME/SEV has to clear the mask to share the page. TDX has to set it. Making a single global mask only increases confusion. -- Kirill A. Shutemov