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From: Brijesh Singh <brijesh.singh@amd.com>
To: <x86@kernel.org>, <linux-kernel@vger.kernel.org>,
	<kvm@vger.kernel.org>, <linux-efi@vger.kernel.org>,
	<platform-driver-x86@vger.kernel.org>,
	<linux-coco@lists.linux.dev>, <linux-mm@kvack.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Joerg Roedel <jroedel@suse.de>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Sean Christopherson <seanjc@google.com>,
	"Vitaly Kuznetsov" <vkuznets@redhat.com>,
	Jim Mattson <jmattson@google.com>,
	"Andy Lutomirski" <luto@kernel.org>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Sergio Lopez <slp@redhat.com>, Peter Gonda <pgonda@google.com>,
	"Peter Zijlstra" <peterz@infradead.org>,
	Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
	David Rientjes <rientjes@google.com>,
	Dov Murik <dovmurik@linux.ibm.com>,
	Tobin Feldman-Fitzthum <tobin@ibm.com>,
	Borislav Petkov <bp@alien8.de>,
	Michael Roth <michael.roth@amd.com>,
	Vlastimil Babka <vbabka@suse.cz>,
	"Kirill A . Shutemov" <kirill@shutemov.name>,
	Andi Kleen <ak@linux.intel.com>,
	"Dr . David Alan Gilbert" <dgilbert@redhat.com>,
	<tony.luck@intel.com>, <marcorr@google.com>,
	<sathyanarayanan.kuppuswamy@linux.intel.com>,
	Brijesh Singh <brijesh.singh@amd.com>
Subject: [PATCH v7 26/45] x86/head: re-enable stack protection for 32/64-bit builds
Date: Wed, 10 Nov 2021 16:07:12 -0600	[thread overview]
Message-ID: <20211110220731.2396491-27-brijesh.singh@amd.com> (raw)
In-Reply-To: <20211110220731.2396491-1-brijesh.singh@amd.com>

From: Michael Roth <michael.roth@amd.com>

As of commit 103a4908ad4d ("x86/head/64: Disable stack protection for
head$(BITS).o") kernel/head64.c is compiled with -fno-stack-protector
to allow a call to set_bringup_idt_handler(), which would otherwise
have stack protection enabled with CONFIG_STACKPROTECTOR_STRONG. While
sufficient for that case, there may still be issues with calls to any
external functions that were compiled with stack protection enabled that
in-turn make stack-protected calls, or if the exception handlers set up
by set_bringup_idt_handler() make calls to stack-protected functions.
As part of 103a4908ad4d, stack protection was also disabled for
kernel/head32.c as a precaution.

Subsequent patches for SEV-SNP CPUID validation support will introduce
both such cases. Attempting to disable stack protection for everything
in scope to address that is prohibitive since much of the code, like
SEV-ES #VC handler, is shared code that remains in use after boot and
could benefit from having stack protection enabled. Attempting to inline
calls is brittle and can quickly balloon out to library/helper code
where that's not really an option.

Instead, re-enable stack protection for head32.c/head64.c and make the
appropriate changes to ensure the segment used for the stack canary is
initialized in advance of any stack-protected C calls.

for head64.c:

- The BSP will enter from startup_64 and call into C code
  (startup_64_setup_env) shortly after setting up the stack, which may
  result in calls to stack-protected code. Set up %gs early to allow
  for this safely.
- APs will enter from secondary_startup_64*, and %gs will be set up
  soon after. There is one call to C code prior to this
  (__startup_secondary_64), but it is only to fetch sme_me_mask, and
  unlikely to be stack-protected, so leave things as they are, but add
  a note about this in case things change in the future.

for head32.c:

- BSPs/APs will set %fs to __BOOT_DS prior to any C calls. In recent
  kernels, the compiler is configured to access the stack canary at
  %fs:__stack_chk_guard, which overlaps with the initial per-cpu
  __stack_chk_guard variable in the initial/'master' .data..percpu
  area. This is sufficient to allow access to the canary for use
  during initial startup, so no changes are needed there.

Suggested-by: Joerg Roedel <jroedel@suse.de> #for 64-bit %gs set up
Signed-off-by: Michael Roth <michael.roth@amd.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
---
 arch/x86/kernel/Makefile  |  1 -
 arch/x86/kernel/head_64.S | 24 ++++++++++++++++++++++++
 2 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 2ff3e600f426..4df8c8f7d2ac 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -48,7 +48,6 @@ endif
 # non-deterministic coverage.
 KCOV_INSTRUMENT		:= n
 
-CFLAGS_head$(BITS).o	+= -fno-stack-protector
 CFLAGS_cc_platform.o	+= -fno-stack-protector
 
 CFLAGS_irq.o := -I $(srctree)/$(src)/../include/asm/trace
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index d8b3ebd2bb85..7074ebf2b47b 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -65,6 +65,22 @@ SYM_CODE_START_NOALIGN(startup_64)
 	leaq	(__end_init_task - FRAME_SIZE)(%rip), %rsp
 
 	leaq	_text(%rip), %rdi
+
+	/*
+	 * initial_gs points to initial fixed_per_cpu struct with storage for
+	 * the stack protector canary. Global pointer fixups are needed at this
+	 * stage, so apply them as is done in fixup_pointer(), and initialize %gs
+	 * such that the canary can be accessed at %gs:40 for subsequent C calls.
+	 */
+	movl	$MSR_GS_BASE, %ecx
+	movq	initial_gs(%rip), %rax
+	movq	$_text, %rdx
+	subq	%rdx, %rax
+	addq	%rdi, %rax
+	movq	%rax, %rdx
+	shrq	$32,  %rdx
+	wrmsr
+
 	pushq	%rsi
 	call	startup_64_setup_env
 	popq	%rsi
@@ -133,6 +149,14 @@ SYM_INNER_LABEL(secondary_startup_64_no_verify, SYM_L_GLOBAL)
 	 * added to the initial pgdir entry that will be programmed into CR3.
 	 */
 	pushq	%rsi
+	/*
+	 * NOTE: %gs at this point is a stale data segment left over from the
+	 * real-mode trampoline, so the default stack protector canary location
+	 * at %gs:40 does not yet coincide with the expected fixed_per_cpu struct
+	 * that contains storage for the stack canary. So take care not to add
+	 * anything to the C functions in this path that would result in stack
+	 * protected C code being generated.
+	 */
 	call	__startup_secondary_64
 	popq	%rsi
 
-- 
2.25.1



  parent reply	other threads:[~2021-11-10 22:09 UTC|newest]

Thread overview: 77+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-10 22:06 [PATCH v7 00/45] Add AMD Secure Nested Paging (SEV-SNP) Guest Support Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 01/45] x86/compressed/64: detect/setup SEV/SME features earlier in boot Brijesh Singh
2021-11-12 16:52   ` Borislav Petkov
2021-11-12 20:30     ` Michael Roth
2021-11-23 21:55       ` Venu Busireddy
2021-11-10 22:06 ` [PATCH v7 02/45] x86/sev: " Brijesh Singh
2021-11-15 19:12   ` Borislav Petkov
2021-11-15 20:17     ` Michael Roth
2021-11-17 13:11       ` Borislav Petkov
2021-12-06 23:47   ` Venu Busireddy
2021-11-10 22:06 ` [PATCH v7 03/45] x86/mm: Extend cc_attr to include AMD SEV-SNP Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 04/45] x86/sev: Shorten GHCB terminate macro names Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 05/45] x86/sev: Get rid of excessive use of defines Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 06/45] x86/head64: Carve out the guest encryption postprocessing into a helper Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 07/45] x86/sev: Remove do_early_exception() forward declarations Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 08/45] x86/sev: Define the Linux specific guest termination reasons Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 09/45] x86/sev: Save the negotiated GHCB version Brijesh Singh
2021-12-07 12:51   ` Tianyu Lan
     [not found]     ` <Ya9e7fDxj6WiomqI@zn.tnic>
2021-12-07 16:58       ` Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 10/45] x86/sev: Add support for hypervisor feature VMGEXIT Brijesh Singh
2021-12-02 17:52   ` Borislav Petkov
2021-12-06 15:15     ` Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 11/45] x86/sev: Check SEV-SNP features support Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 12/45] x86/sev: Add a helper for the PVALIDATE instruction Brijesh Singh
2021-11-10 22:06 ` [PATCH v7 13/45] x86/sev: Check the vmpl level Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 14/45] x86/compressed: Add helper for validating pages in the decompression stage Brijesh Singh
     [not found]   ` <Ya9J8FSeyv/cEhnb@zn.tnic>
2021-12-07 19:21     ` Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 15/45] x86/compressed: Register GHCB memory when SEV-SNP is active Brijesh Singh
2021-11-15 14:05   ` Jörg Rödel
2021-11-10 22:07 ` [PATCH v7 16/45] x86/sev: " Brijesh Singh
2021-12-08 17:41   ` Borislav Petkov
2021-11-10 22:07 ` [PATCH v7 17/45] x86/sev: Add helper for validating pages in early enc attribute changes Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 18/45] x86/kernel: Make the bss.decrypted section shared in RMP table Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 19/45] x86/kernel: Validate rom memory before accessing when SEV-SNP is active Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 20/45] x86/mm: Add support to validate memory when changing C-bit Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 21/45] KVM: SVM: Define sev_features and vmpl field in the VMSA Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 22/45] KVM: SVM: Create a separate mapping for the SEV-ES save area Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 23/45] KVM: SVM: Create a separate mapping for the GHCB " Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 24/45] KVM: SVM: Update the SEV-ES save area mapping Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 25/45] x86/sev: Use SEV-SNP AP creation to start secondary CPUs Brijesh Singh
2021-11-10 22:07 ` Brijesh Singh [this message]
2021-11-10 22:07 ` [PATCH v7 27/45] x86/sev: move MSR-based VMGEXITs for CPUID to helper Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 28/45] KVM: x86: move lookup of indexed CPUID leafs " Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 29/45] x86/compressed/acpi: move EFI system table lookup " Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 30/45] x86/compressed/acpi: move EFI config " Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 31/45] x86/compressed/acpi: move EFI vendor " Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 32/45] x86/boot: Add Confidential Computing type to setup_data Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 33/45] KVM: SEV: Add documentation for SEV-SNP CPUID Enforcement Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 34/45] x86/compressed/64: add support for SEV-SNP CPUID table in #VC handlers Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 35/45] x86/boot: add a pointer to Confidential Computing blob in bootparams Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 36/45] x86/compressed: add SEV-SNP feature detection/setup Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 37/45] x86/compressed: use firmware-validated CPUID for SEV-SNP guests Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 38/45] x86/compressed/64: add identity mapping for Confidential Computing blob Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 39/45] x86/sev: add SEV-SNP feature detection/setup Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 40/45] x86/sev: use firmware-validated CPUID for SEV-SNP guests Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 41/45] x86/sev: Provide support for SNP guest request NAEs Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 42/45] x86/sev: Register SNP guest request platform device Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 43/45] virt: Add SEV-SNP guest driver Brijesh Singh
2021-11-10 22:27   ` Randy Dunlap
2021-11-11 19:27     ` Brijesh Singh
2021-11-11 22:57       ` Randy Dunlap
2021-11-17 23:34   ` Peter Gonda
2021-11-18 17:08     ` Peter Gonda
2021-11-18 17:32     ` Brijesh Singh
2021-11-19 16:16       ` Peter Gonda
2021-11-20  0:28         ` Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 44/45] virt: sevguest: Add support to derive key Brijesh Singh
2021-11-18 16:43   ` Peter Gonda
2021-11-18 17:43     ` Brijesh Singh
2021-11-10 22:07 ` [PATCH v7 45/45] virt: sevguest: Add support to get extended report Brijesh Singh
2021-11-15 15:56 ` [PATCH v7 00/45] Add AMD Secure Nested Paging (SEV-SNP) Guest Support Venu Busireddy
2021-11-15 16:02   ` Brijesh Singh
2021-11-15 16:37     ` Venu Busireddy
2021-11-15 16:45       ` Brijesh Singh
2021-11-15 16:55         ` Venu Busireddy
2021-11-16 15:45           ` Venu Busireddy
2021-11-16 16:03             ` Brijesh Singh

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