From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 141AEC43603 for ; Thu, 15 Apr 2021 22:17:58 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id A4998610F7 for ; Thu, 15 Apr 2021 22:17:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A4998610F7 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id A8CFC8E000F; Thu, 15 Apr 2021 18:17:52 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id A61A08D000C; Thu, 15 Apr 2021 18:17:52 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 7A3B58D000F; Thu, 15 Apr 2021 18:17:52 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0206.hostedemail.com [216.40.44.206]) by kanga.kvack.org (Postfix) with ESMTP id 43C078D000C for ; Thu, 15 Apr 2021 18:17:52 -0400 (EDT) Received: from smtpin19.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay05.hostedemail.com (Postfix) with ESMTP id 04EF71838E528 for ; Thu, 15 Apr 2021 22:17:52 +0000 (UTC) X-FDA: 78036014784.19.10413C8 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by imf02.hostedemail.com (Postfix) with ESMTP id EF4EA40002D7 for ; Thu, 15 Apr 2021 22:17:33 +0000 (UTC) IronPort-SDR: kAnCUC5SHl/zIH4U2H7D/tFxPIPWdFqAyUHxxB7gSai/O3VFbmVZxEVO8VM/h6p75Q4N1BnEz4 M1k5tDY7Qr0Q== X-IronPort-AV: E=McAfee;i="6200,9189,9955"; a="215468368" X-IronPort-AV: E=Sophos;i="5.82,225,1613462400"; d="scan'208";a="215468368" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Apr 2021 15:17:48 -0700 IronPort-SDR: eZcpF59bidmyafLieAacJAhx8mMsmULeB5Sao3Mqc2gvetg0QfZZRAPTppGbp89WtKAy+oy8ie f4sqCPQh4dgQ== X-IronPort-AV: E=Sophos;i="5.82,225,1613462400"; d="scan'208";a="399720968" Received: from yyu32-desk.sc.intel.com ([143.183.136.146]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Apr 2021 15:17:46 -0700 From: Yu-cheng Yu To: x86@kernel.org, "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin , Weijiang Yang , Pengfei Xu , Haitao Huang Cc: Yu-cheng Yu Subject: [PATCH v25 3/9] x86/cet/ibt: Handle signals for Indirect Branch Tracking Date: Thu, 15 Apr 2021 15:17:28 -0700 Message-Id: <20210415221734.32628-4-yu-cheng.yu@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20210415221734.32628-1-yu-cheng.yu@intel.com> References: <20210415221734.32628-1-yu-cheng.yu@intel.com> MIME-Version: 1.0 X-Rspamd-Server: rspam01 X-Rspamd-Queue-Id: EF4EA40002D7 X-Stat-Signature: tacadfs4t58fpyuzrxd7ae9petzqcdhx Received-SPF: none (intel.com>: No applicable sender policy available) receiver=imf02; identity=mailfrom; envelope-from=""; helo=mga01.intel.com; client-ip=192.55.52.88 X-HE-DKIM-Result: none/none X-HE-Tag: 1618525053-39696 Content-Transfer-Encoding: quoted-printable X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: When an indirect CALL/JMP instruction is executed and before it reaches the target, it is in 'WAIT_ENDBR' status, which can be read from MSR_IA32_U_CET. The status is part of a task's status before a signal is raised and preserved in the signal frame. It is restored for sigreturn. IBT state machine is described in Intel SDM Vol. 1, Sec. 18.3. Signed-off-by: Yu-cheng Yu Cc: Kees Cook --- v25: - Move the addition of sc_ext.wait_endbr from an earlier shadow stack patch to here. - Change X86_FEATURE_CET to X86_FEATURE_SHSTK. - Change wrmsrl() to wrmsrl_safe() and handle error. v24: - Update for changes from splitting shadow stack and ibt. arch/x86/include/uapi/asm/sigcontext.h | 1 + arch/x86/kernel/fpu/signal.c | 33 +++++++++++++++++++++++--- 2 files changed, 31 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/uapi/asm/sigcontext.h b/arch/x86/include/ua= pi/asm/sigcontext.h index 10d7fa192d48..ee5bacce7d87 100644 --- a/arch/x86/include/uapi/asm/sigcontext.h +++ b/arch/x86/include/uapi/asm/sigcontext.h @@ -203,6 +203,7 @@ struct _xstate { struct sc_ext { unsigned long total_size; unsigned long ssp; + unsigned long wait_endbr; }; =20 /* diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c index 0488407bec81..0ed01e70b09e 100644 --- a/arch/x86/kernel/fpu/signal.c +++ b/arch/x86/kernel/fpu/signal.c @@ -71,16 +71,29 @@ int save_extra_state_to_sigframe(int ia32, void __use= r *fp, void __user *restore return err; =20 ext.ssp =3D token_addr; + } =20 + if (new_ssp || cet->ibt_enabled) { fpregs_lock(); if (test_thread_flag(TIF_NEED_FPU_LOAD)) __fpregs_load_activate(); if (new_ssp) err =3D wrmsrl_safe(MSR_IA32_PL3_SSP, new_ssp); + + if (!err && cet->ibt_enabled) { + u64 msr_val; + + err =3D rdmsrl_safe(MSR_IA32_U_CET, &msr_val); + if (!err && (msr_val & CET_WAIT_ENDBR)) { + ext.wait_endbr =3D 1; + msr_val &=3D ~CET_WAIT_ENDBR; + err =3D wrmsrl_safe(MSR_IA32_U_CET, msr_val); + } + } fpregs_unlock(); } =20 - if (!err && ext.ssp) { + if (!err && (ext.ssp || cet->ibt_enabled)) { void __user *p =3D fp; =20 ext.total_size =3D sizeof(ext); @@ -110,7 +123,8 @@ static int get_extra_state_from_sigframe(int ia32, vo= id __user *fp, struct sc_ex if (!cpu_feature_enabled(X86_FEATURE_SHSTK)) return 0; =20 - if (!cet->shstk_size) + if (!cet->shstk_size && + !cet->ibt_enabled) return 0; =20 memset(ext, 0, sizeof(*ext)); @@ -149,6 +163,19 @@ static int restore_extra_state_to_xregs(struct sc_ex= t *sc_ext) =20 if (cet->shstk_size) err =3D wrmsrl_safe(MSR_IA32_PL3_SSP, sc_ext->ssp); + + if (err) + return err; + + if (cet->ibt_enabled && sc_ext->wait_endbr) { + u64 msr_val; + + err =3D rdmsrl_safe(MSR_IA32_U_CET, &msr_val); + if (!err) { + msr_val |=3D CET_WAIT_ENDBR; + err =3D wrmsrl_safe(MSR_IA32_U_CET, msr_val); + } + } #endif return err; } @@ -616,7 +643,7 @@ static unsigned long fpu__alloc_sigcontext_ext(unsign= ed long sp) * sigcontext_ext is at: fpu + fpu_user_xstate_size + * FP_XSTATE_MAGIC2_SIZE, then aligned to 8. */ - if (cet->shstk_size) + if (cet->shstk_size || cet->ibt_enabled) sp -=3D (sizeof(struct sc_ext) + 8); #endif return sp; --=20 2.21.0