From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8EA0AC433DB for ; Fri, 5 Feb 2021 16:01:51 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id C158964F30 for ; Fri, 5 Feb 2021 16:01:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C158964F30 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id 26F006B0071; Fri, 5 Feb 2021 11:01:50 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 21DF96B007B; Fri, 5 Feb 2021 11:01:50 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 15ACD6B007D; Fri, 5 Feb 2021 11:01:50 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0127.hostedemail.com [216.40.44.127]) by kanga.kvack.org (Postfix) with ESMTP id F3E106B0071 for ; Fri, 5 Feb 2021 11:01:49 -0500 (EST) Received: from smtpin15.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay01.hostedemail.com (Postfix) with ESMTP id B450A180AD837 for ; Fri, 5 Feb 2021 16:01:49 +0000 (UTC) X-FDA: 77784679938.15.price73_1e0bc82275e6 Received: from filter.hostedemail.com (10.5.16.251.rfc1918.com [10.5.16.251]) by smtpin15.hostedemail.com (Postfix) with ESMTP id EFF661814BA38 for ; Fri, 5 Feb 2021 16:01:38 +0000 (UTC) X-HE-Tag: price73_1e0bc82275e6 X-Filterd-Recvd-Size: 2593 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by imf40.hostedemail.com (Postfix) with ESMTP for ; Fri, 5 Feb 2021 16:01:37 +0000 (UTC) IronPort-SDR: vKSNN+nD4tCqi/F0gSu7jfGA3NDsQfqNRI2UoJ1wyO3qA7mskesrf3xpVjsvdg+pMSSBw/7rs3 mWrKfVgiebsQ== X-IronPort-AV: E=McAfee;i="6000,8403,9885"; a="266278910" X-IronPort-AV: E=Sophos;i="5.81,155,1610438400"; d="scan'208";a="266278910" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2021 08:01:32 -0800 IronPort-SDR: XM0B3MmmoWzhRiAeh0KlBcUrZDjGoqkkDfHi61Otf6dih0ahbZZXPqcTwXdkH+DME12WkBAR21 aHWaSFFWEt/w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,155,1610438400"; d="scan'208";a="508578982" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga004.jf.intel.com with ESMTP; 05 Feb 2021 08:01:28 -0800 Received: by black.fi.intel.com (Postfix, from userid 1000) id D6D3B184; Fri, 5 Feb 2021 18:01:27 +0200 (EET) Date: Fri, 5 Feb 2021 19:01:27 +0300 From: "Kirill A. Shutemov" To: Peter Zijlstra Cc: Dave Hansen , Andy Lutomirski , x86@kernel.org, Andrey Ryabinin , Alexander Potapenko , Dmitry Vyukov , Catalin Marinas , Will Deacon , "H . J . Lu" , Andi Kleen , linux-mm@kvack.org, linux-kernel@vger.kernel.org Subject: Re: [RFC 0/9] Linear Address Masking enabling Message-ID: <20210205160127.ylcdd6bbve6q2bbk@black.fi.intel.com> References: <20210205151631.43511-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Fri, Feb 05, 2021 at 04:49:05PM +0100, Peter Zijlstra wrote: > On Fri, Feb 05, 2021 at 06:16:20PM +0300, Kirill A. Shutemov wrote: > > The feature competes for bits with 5-level paging: LAM_U48 makes it > > impossible to map anything about 47-bits. The patchset made these > > capability mutually exclusive: whatever used first wins. LAM_U57 can be > > combined with mappings above 47-bits. > > And I suppose we still can't switch between 4 and 5 level at runtime, > using a CR3 bit? No. And I can't imagine how would it work with 5-level on kernel side. -- Kirill A. Shutemov