From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A14E0C43461 for ; Tue, 8 Sep 2020 14:50:28 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 2FD2322B4B for ; Tue, 8 Sep 2020 14:50:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2FD2322B4B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id AA4876B0003; Tue, 8 Sep 2020 10:50:27 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id A528B6B0037; Tue, 8 Sep 2020 10:50:27 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 942F46B006C; Tue, 8 Sep 2020 10:50:27 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0061.hostedemail.com [216.40.44.61]) by kanga.kvack.org (Postfix) with ESMTP id 7B6416B0003 for ; Tue, 8 Sep 2020 10:50:27 -0400 (EDT) Received: from smtpin21.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay05.hostedemail.com (Postfix) with ESMTP id 273FC181AEF10 for ; Tue, 8 Sep 2020 14:50:27 +0000 (UTC) X-FDA: 77240180094.21.rice88_5b1266d270d5 Received: from filter.hostedemail.com (10.5.16.251.rfc1918.com [10.5.16.251]) by smtpin21.hostedemail.com (Postfix) with ESMTP id E2201180442C2 for ; Tue, 8 Sep 2020 14:50:26 +0000 (UTC) X-HE-Tag: rice88_5b1266d270d5 X-Filterd-Recvd-Size: 4501 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by imf35.hostedemail.com (Postfix) with ESMTP for ; Tue, 8 Sep 2020 14:50:26 +0000 (UTC) Received: from gaia (unknown [46.69.195.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8D4D522B49; Tue, 8 Sep 2020 14:50:22 +0000 (UTC) Date: Tue, 8 Sep 2020 15:50:20 +0100 From: Catalin Marinas To: Andrey Konovalov Cc: Dmitry Vyukov , Vincenzo Frascino , kasan-dev , Andrey Ryabinin , Alexander Potapenko , Marco Elver , Evgenii Stepanov , Elena Petrova , Branislav Rankov , Kevin Brodsky , Will Deacon , Andrew Morton , Linux ARM , Linux Memory Management List , LKML Subject: Re: [PATCH 20/35] arm64: mte: Add in-kernel MTE helpers Message-ID: <20200908145019.GH25591@gaia> References: <2cf260bdc20793419e32240d2a3e692b0adf1f80.1597425745.git.andreyknvl@google.com> <20200827093808.GB29264@gaia> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-Rspamd-Queue-Id: E2201180442C2 X-Spamd-Result: default: False [0.00 / 100.00] X-Rspamd-Server: rspam03 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Tue, Sep 08, 2020 at 03:23:20PM +0200, Andrey Konovalov wrote: > On Thu, Aug 27, 2020 at 11:38 AM Catalin Marinas > wrote: > > On Fri, Aug 14, 2020 at 07:27:02PM +0200, Andrey Konovalov wrote: > > > diff --git a/arch/arm64/include/asm/mte.h b/arch/arm64/include/asm/mte.h > > > index 1c99fcadb58c..733be1cb5c95 100644 > > > --- a/arch/arm64/include/asm/mte.h > > > +++ b/arch/arm64/include/asm/mte.h > > > @@ -5,14 +5,19 @@ > > > #ifndef __ASM_MTE_H > > > #define __ASM_MTE_H > > > > > > -#define MTE_GRANULE_SIZE UL(16) > > > +#include > > > > So the reason for this move is to include it in asm/cache.h. Fine by > > me but... > > > > > #define MTE_GRANULE_MASK (~(MTE_GRANULE_SIZE - 1)) > > > #define MTE_TAG_SHIFT 56 > > > #define MTE_TAG_SIZE 4 > > > +#define MTE_TAG_MASK GENMASK((MTE_TAG_SHIFT + (MTE_TAG_SIZE - 1)), MTE_TAG_SHIFT) > > > +#define MTE_TAG_MAX (MTE_TAG_MASK >> MTE_TAG_SHIFT) > > > > ... I'd rather move all these definitions in a file with a more > > meaningful name like mte-def.h. The _asm implies being meant for .S > > files inclusion which isn't the case. > > > > > diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c > > > index eb39504e390a..e2d708b4583d 100644 > > > --- a/arch/arm64/kernel/mte.c > > > +++ b/arch/arm64/kernel/mte.c > > > @@ -72,6 +74,47 @@ int memcmp_pages(struct page *page1, struct page *page2) > > > return ret; > > > } > > > > > > +u8 mte_get_mem_tag(void *addr) > > > +{ > > > + if (system_supports_mte()) > > > + addr = mte_assign_valid_ptr_tag(addr); > > > > The mte_assign_valid_ptr_tag() is slightly misleading. All it does is > > read the allocation tag from memory. > > > > I also think this should be inline asm, possibly using alternatives. > > It's just an LDG instruction (and it saves us from having to invent a > > better function name). > > Could you point me to an example of inline asm with alternatives if > there's any? I see alternative_if and other similar macros used in > arch/arm64/ code, is that what you mean? Those seem to always use > static conditions, like config values, but here we have a dynamic > system_supports_mte(). Could you elaborate on how I should implement > this? There are plenty of ALTERNATIVE macro uses under arch/arm64, see arch/arm64/include/asm/alternative.h for the definition and some simple documentation. In this case, something like (untested, haven't even checked whether it matches the mte_assign_valid_ptr_tag() code): asm(ALTERNATIVE("orr %0, %1, #0xff << 56", "ldg %0, [%1]", ARM64_HAS_MTE)); -- Catalin