From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 583F5C433DF for ; Thu, 27 Aug 2020 10:38:27 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 03CC922BF5 for ; Thu, 27 Aug 2020 10:38:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 03CC922BF5 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id 7C2828E0007; Thu, 27 Aug 2020 06:38:26 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 773088E0003; Thu, 27 Aug 2020 06:38:26 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 662388E0007; Thu, 27 Aug 2020 06:38:26 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0098.hostedemail.com [216.40.44.98]) by kanga.kvack.org (Postfix) with ESMTP id 501108E0003 for ; Thu, 27 Aug 2020 06:38:26 -0400 (EDT) Received: from smtpin28.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay02.hostedemail.com (Postfix) with ESMTP id 05B123625 for ; Thu, 27 Aug 2020 10:38:26 +0000 (UTC) X-FDA: 77195999412.28.rate71_10155742706c Received: from filter.hostedemail.com (10.5.16.251.rfc1918.com [10.5.16.251]) by smtpin28.hostedemail.com (Postfix) with ESMTP id CFBA06C04 for ; Thu, 27 Aug 2020 10:38:25 +0000 (UTC) X-HE-Tag: rate71_10155742706c X-Filterd-Recvd-Size: 4532 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by imf24.hostedemail.com (Postfix) with ESMTP for ; Thu, 27 Aug 2020 10:38:25 +0000 (UTC) Received: from gaia (unknown [46.69.195.127]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 01EF022B40; Thu, 27 Aug 2020 10:38:21 +0000 (UTC) Date: Thu, 27 Aug 2020 11:38:19 +0100 From: Catalin Marinas To: Andrey Konovalov Cc: Dmitry Vyukov , Vincenzo Frascino , kasan-dev@googlegroups.com, Andrey Ryabinin , Alexander Potapenko , Marco Elver , Evgenii Stepanov , Elena Petrova , Branislav Rankov , Kevin Brodsky , Will Deacon , Andrew Morton , linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 24/35] arm64: mte: Switch GCR_EL1 in kernel entry and exit Message-ID: <20200827103819.GE29264@gaia> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-Rspamd-Queue-Id: CFBA06C04 X-Spamd-Result: default: False [0.00 / 100.00] X-Rspamd-Server: rspam01 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Fri, Aug 14, 2020 at 07:27:06PM +0200, Andrey Konovalov wrote: > diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S > index cde127508e38..a17fefb0571b 100644 > --- a/arch/arm64/kernel/entry.S > +++ b/arch/arm64/kernel/entry.S > @@ -172,6 +172,29 @@ alternative_else_nop_endif > #endif > .endm > > + /* Note: tmp should always be a callee-saved register */ Why callee-saved? Do you preserve it anywhere here? > + .macro mte_restore_gcr, el, tsk, tmp, tmp2 > +#ifdef CONFIG_ARM64_MTE > +alternative_if_not ARM64_MTE > + b 1f > +alternative_else_nop_endif > + .if \el == 0 > + ldr \tmp, [\tsk, #THREAD_GCR_EL1_USER] > + .else > + ldr_l \tmp, gcr_kernel_excl > + .endif > + /* > + * Calculate and set the exclude mask preserving > + * the RRND (bit[16]) setting. > + */ > + mrs_s \tmp2, SYS_GCR_EL1 > + bfi \tmp2, \tmp, #0, #16 > + msr_s SYS_GCR_EL1, \tmp2 > + isb > +1: > +#endif > + .endm > + > .macro kernel_entry, el, regsize = 64 > .if \regsize == 32 > mov w0, w0 // zero upper 32 bits of x0 > @@ -209,6 +232,8 @@ alternative_else_nop_endif > > ptrauth_keys_install_kernel tsk, x20, x22, x23 > > + mte_restore_gcr 1, tsk, x22, x23 > + > scs_load tsk, x20 > .else > add x21, sp, #S_FRAME_SIZE > @@ -386,6 +411,8 @@ alternative_else_nop_endif > /* No kernel C function calls after this as user keys are set. */ > ptrauth_keys_install_user tsk, x0, x1, x2 > > + mte_restore_gcr 0, tsk, x0, x1 > + > apply_ssbd 0, x0, x1 > .endif > > @@ -957,6 +984,7 @@ SYM_FUNC_START(cpu_switch_to) > mov sp, x9 > msr sp_el0, x1 > ptrauth_keys_install_kernel x1, x8, x9, x10 > + mte_restore_gcr 1, x1, x8, x9 > scs_save x0, x8 > scs_load x1, x8 > ret Since we set GCR_EL1 on exception entry and return, why is this needed? We don't have a per-kernel thread GCR_EL1, it's global to all threads, so I think cpu_switch_to() should not be touched. > diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c > index 7717ea9bc2a7..cfac7d02f032 100644 > --- a/arch/arm64/kernel/mte.c > +++ b/arch/arm64/kernel/mte.c > @@ -18,10 +18,14 @@ > > #include > #include > +#include > +#include > #include > #include > #include > > +u64 gcr_kernel_excl __read_mostly; Could we make this __ro_after_init? > + > static void mte_sync_page_tags(struct page *page, pte_t *ptep, bool check_swap) > { > pte_t old_pte = READ_ONCE(*ptep); > @@ -115,6 +119,13 @@ void * __must_check mte_set_mem_tag_range(void *addr, size_t size, u8 tag) > return ptr; > } > > +void mte_init_tags(u64 max_tag) > +{ > + u64 incl = ((1ULL << ((max_tag & MTE_TAG_MAX) + 1)) - 1); I'd rather use GENMASK here, it is more readable. -- Catalin