From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA90AC433E2 for ; Wed, 27 May 2020 19:49:58 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 68864208B8 for ; Wed, 27 May 2020 19:49:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="RbHn4yG2" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 68864208B8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id F32508001A; Wed, 27 May 2020 15:49:57 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id EBAA180010; Wed, 27 May 2020 15:49:57 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id D83798001A; Wed, 27 May 2020 15:49:57 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0112.hostedemail.com [216.40.44.112]) by kanga.kvack.org (Postfix) with ESMTP id BEA4680010 for ; Wed, 27 May 2020 15:49:57 -0400 (EDT) Received: from smtpin22.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay04.hostedemail.com (Postfix) with ESMTP id 7A64AD2EB9 for ; Wed, 27 May 2020 19:49:57 +0000 (UTC) X-FDA: 76863539634.22.grain90_910e76918222b Received: from filter.hostedemail.com (10.5.16.251.rfc1918.com [10.5.16.251]) by smtpin22.hostedemail.com (Postfix) with ESMTP id 5FF8B180C59E3 for ; Wed, 27 May 2020 19:49:57 +0000 (UTC) X-HE-Tag: grain90_910e76918222b X-Filterd-Recvd-Size: 6417 Received: from hqnvemgate25.nvidia.com (hqnvemgate25.nvidia.com [216.228.121.64]) by imf20.hostedemail.com (Postfix) with ESMTP for ; Wed, 27 May 2020 19:49:56 +0000 (UTC) Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Wed, 27 May 2020 12:48:32 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Wed, 27 May 2020 12:49:55 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Wed, 27 May 2020 12:49:55 -0700 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 27 May 2020 19:49:55 +0000 Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Wed, 27 May 2020 19:49:55 +0000 Received: from sandstorm.nvidia.com (Not Verified[10.2.87.74]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Wed, 27 May 2020 12:49:55 -0700 From: John Hubbard To: Andrew Morton CC: Souptick Joarder , LKML , , John Hubbard , Daniel Vetter , =?UTF-8?q?J=C3=A9r=C3=B4me=20Glisse?= , Vlastimil Babka , Jan Kara , Dave Chinner , Jonathan Corbet , , Subject: [PATCH] mm/gup: update pin_user_pages.rst for "case 3" (mmu notifiers) Date: Wed, 27 May 2020 12:49:53 -0700 Message-ID: <20200527194953.11130-1-jhubbard@nvidia.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 X-NVConfidentiality: public Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1590608912; bh=+JO9SzIVC7F8gI8jTFzEl6QoxL/thoNHpxziO/PBuik=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: MIME-Version:X-NVConfidentiality:Content-Type: Content-Transfer-Encoding; b=RbHn4yG2kSWbcFxzxdHvbZj23GM1l2XQ9OV43KKqB5pYAAx0dqZbie/A8Lqe7iA8N D3Xv3j5Dm16ONLL0bFQGcsZX3X4x3NSRsWwXzknqY5esUouiyjwcd+WKX6bK0z6bKX tZtbIaYr6XyQwN2CqThSIgUKjVbBXz6zPp/kZYHVvhMmqCDVtvxfowJXSBcWsNsDqW hVMwcZZQhRR1I3NPHeiEdBXN5rXNrcT26/g12MndJ67DRV7Zu3sjBM/mvEGn/48Kif af4BZjhcPZeI6WEHMUpqJ7u/rJpAGCQXIpF5RdLZ/7xEwHgAyHYet9n5rrzvxrOVRS mwUAVRtqviZqg== X-Rspamd-Queue-Id: 5FF8B180C59E3 X-Spamd-Result: default: False [0.00 / 100.00] X-Rspamd-Server: rspam03 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Update case 3 so that it covers the use of mmu notifiers, for hardware that does, or does not have replayable page faults. Also, elaborate case 4 slightly, as it was quite cryptic. Cc: Daniel Vetter Cc: J=C3=A9r=C3=B4me Glisse Cc: Vlastimil Babka Cc: Jan Kara Cc: Dave Chinner Cc: Jonathan Corbet Cc: linux-doc@vger.kernel.org Cc: linux-fsdevel@vger.kernel.org Signed-off-by: John Hubbard --- Documentation/core-api/pin_user_pages.rst | 33 +++++++++++++---------- 1 file changed, 19 insertions(+), 14 deletions(-) diff --git a/Documentation/core-api/pin_user_pages.rst b/Documentation/core= -api/pin_user_pages.rst index 2e939ff10b86..4675b04e8829 100644 --- a/Documentation/core-api/pin_user_pages.rst +++ b/Documentation/core-api/pin_user_pages.rst @@ -148,23 +148,28 @@ NOTE: Some pages, such as DAX pages, cannot be pinned= with longterm pins. That's because DAX pages do not have a separate page cache, and so "pinning" impl= ies locking down file system blocks, which is not (yet) supported in that way. =20 -CASE 3: Hardware with page faulting support -------------------------------------------- -Here, a well-written driver doesn't normally need to pin pages at all. How= ever, -if the driver does choose to do so, it can register MMU notifiers for the = range, -and will be called back upon invalidation. Either way (avoiding page pinni= ng, or -using MMU notifiers to unpin upon request), there is proper synchronizatio= n with -both filesystem and mm (page_mkclean(), munmap(), etc). - -Therefore, neither flag needs to be set. - -In this case, ideally, neither get_user_pages() nor pin_user_pages() shoul= d be -called. Instead, the software should be written so that it does not pin pa= ges. -This allows mm and filesystems to operate more efficiently and reliably. +CASE 3: MMU notifier registration, with or without page faulting hardware +------------------------------------------------------------------------- +Device drivers can pin pages via get_user_pages*(), and register for mmu +notifier callbacks for the memory range. Then, upon receiving a notifier +"invalidate range" callback , stop the device from using the range, and un= pin +the pages. There may be other possible schemes, such as for example explic= itly +synchronizing against pending IO, that accomplish approximately the same t= hing. + +Or, if the hardware supports replayable page faults, then the device drive= r can +avoid pinning entirely (this is ideal), as follows: register for mmu notif= ier +callbacks as above, but instead of stopping the device and unpinning in th= e +callback, simply remove the range from the device's page tables. + +Either way, as long as the driver unpins the pages upon mmu notifier callb= ack, +then there is proper synchronization with both filesystem and mm +(page_mkclean(), munmap(), etc). Therefore, neither flag needs to be set. =20 CASE 4: Pinning for struct page manipulation only ------------------------------------------------- -Here, normal GUP calls are sufficient, so neither flag needs to be set. +If only struct page data (as opposed to the actual memory contents that a = page +is tracking) is affected, then normal GUP calls are sufficient, and neithe= r flag +needs to be set. =20 page_maybe_dma_pinned(): the whole point of pinning =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D --=20 2.26.2