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Wed, 04 Mar 2020 06:09:47 -0800 (PST) Received: from myrica ([2001:171b:c9a8:fbc0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id q12sm41792293wrg.71.2020.03.04.06.09.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Mar 2020 06:09:46 -0800 (PST) Date: Wed, 4 Mar 2020 15:09:40 +0100 From: Jean-Philippe Brucker To: Xu Zaibo Cc: iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, linux-mm@kvack.org, mark.rutland@arm.com, kevin.tian@intel.com, Jean-Philippe Brucker , catalin.marinas@arm.com, robin.murphy@arm.com, robh+dt@kernel.org, zhangfei.gao@linaro.org, will@kernel.org, christian.koenig@amd.com Subject: Re: [PATCH v4 23/26] iommu/arm-smmu-v3: Add stall support for platform devices Message-ID: <20200304140940.GC646000@myrica> References: <20200224182401.353359-1-jean-philippe@linaro.org> <20200224182401.353359-24-jean-philippe@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Wed, Feb 26, 2020 at 04:44:53PM +0800, Xu Zaibo wrote: > Hi, > > > On 2020/2/25 2:23, Jean-Philippe Brucker wrote: > > From: Jean-Philippe Brucker > > > > The SMMU provides a Stall model for handling page faults in platform > > devices. It is similar to PCI PRI, but doesn't require devices to have > > their own translation cache. Instead, faulting transactions are parked and > > the OS is given a chance to fix the page tables and retry the transaction. > > > > Enable stall for devices that support it (opt-in by firmware). When an > > event corresponds to a translation error, call the IOMMU fault handler. If > > the fault is recoverable, it will call us back to terminate or continue > > the stall. > > > > Signed-off-by: Jean-Philippe Brucker > > --- > > drivers/iommu/arm-smmu-v3.c | 271 ++++++++++++++++++++++++++++++++++-- > > drivers/iommu/of_iommu.c | 5 +- > > include/linux/iommu.h | 2 + > > 3 files changed, 269 insertions(+), 9 deletions(-) > > > > diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c > > index 6a5987cce03f..da5dda5ba26a 100644 > > --- a/drivers/iommu/arm-smmu-v3.c > > +++ b/drivers/iommu/arm-smmu-v3.c > > @@ -374,6 +374,13 @@ > > #define CMDQ_PRI_1_GRPID GENMASK_ULL(8, 0) > > #define CMDQ_PRI_1_RESP GENMASK_ULL(13, 12) > [...] > > +static int arm_smmu_page_response(struct device *dev, > > + struct iommu_fault_event *unused, > > + struct iommu_page_response *resp) > > +{ > > + struct arm_smmu_cmdq_ent cmd = {0}; > > + struct arm_smmu_master *master = dev_iommu_fwspec_get(dev)->iommu_priv; > Here can use 'dev_to_master' ? Certainly, good catch Thanks, Jean