From: Peter Zijlstra <peterz@infradead.org>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>
Cc: akpm@linux-foundation.org, npiggin@gmail.com, mpe@ellerman.id.au,
linux-mm@kvack.org, linux-kernel@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, Will Deacon <will@kernel.org>
Subject: [PATCH] asm-generic/tlb: Avoid potential double flush
Date: Tue, 17 Dec 2019 21:12:08 +0100 [thread overview]
Message-ID: <20191217201208.GQ2871@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20191217123416.GH2827@hirez.programming.kicks-ass.net>
On Tue, Dec 17, 2019 at 01:34:16PM +0100, Peter Zijlstra wrote:
> Perhaps if we replace !tlb->end with something like:
>
> !tlb->freed_tables && !tlb->cleared_p*
>
> (which GCC should be able to do with a single load and mask)
>
> I've not really thought too hard about it yet, I need to run some
> errands, but I'll look at it more closely when I get back.
AFAICT this should work.
---
Subject: asm-generic/tlb: Avoid potential double flush
Aneesh reported that:
tlb_flush_mmu()
tlb_flush_mmu_tlbonly()
tlb_flush() <-- #1
tlb_flush_mmu_free()
tlb_table_flush()
tlb_table_invalidate()
tlb_flush_mmu_tlbonly()
tlb_flush() <-- #2
does two TLBIs when tlb->fullmm, because __tlb_reset_range() will not
clear tlb->end in that case.
Observe that any caller to __tlb_adjust_range() also sets at least one
of the tlb->freed_tables || tlb->cleared_p* bits, and those are
unconditionally cleared by __tlb_reset_range().
Change the condition for actually issuing TLBI to having one of those
bits set, as opposed to having tlb->end != 0.
Reported-by: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
include/asm-generic/tlb.h | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h
index fe0ea6ff3636..c9a25c5a83e8 100644
--- a/include/asm-generic/tlb.h
+++ b/include/asm-generic/tlb.h
@@ -402,7 +402,12 @@ tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma) { }
static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
{
- if (!tlb->end)
+ /*
+ * Anything calling __tlb_adjust_range() also sets at least one of
+ * these bits.
+ */
+ if (!(tlb->freed_tables || tlb->cleared_ptes || tlb->cleared_pmds ||
+ tlb->cleared_puds || tlb->cleared_p4ds))
return;
tlb_flush(tlb);
next prev parent reply other threads:[~2019-12-17 20:12 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-17 7:17 [RFC PATCH 1/2] mm/mmu_gather: Invalidate TLB correctly on batch allocation failure and flush Aneesh Kumar K.V
2019-12-17 7:17 ` [RFC PATCH 2/2] mm/mmu_gather: Avoid multiple page walk cache flush Aneesh Kumar K.V
2019-12-17 8:58 ` Peter Zijlstra
2019-12-17 10:15 ` Aneesh Kumar K.V
2019-12-17 12:34 ` Peter Zijlstra
2019-12-17 20:12 ` Peter Zijlstra [this message]
2019-12-17 9:09 ` [RFC PATCH 1/2] mm/mmu_gather: Invalidate TLB correctly on batch allocation failure and flush Peter Zijlstra
2019-12-17 10:48 ` Aneesh Kumar K.V
2019-12-17 12:35 ` Peter Zijlstra
2019-12-18 5:22 ` Aneesh Kumar K.V
2019-12-18 9:01 ` Peter Zijlstra
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