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Wed, 24 Apr 2019 20:50:31 +0000 Received: from MWHPR2201MB1277.namprd22.prod.outlook.com ([fe80::b9d6:bf19:ec58:2765]) by MWHPR2201MB1277.namprd22.prod.outlook.com ([fe80::b9d6:bf19:ec58:2765%7]) with mapi id 15.20.1813.017; Wed, 24 Apr 2019 20:50:31 +0000 From: Paul Burton To: Aaro Koskinen CC: "linux-mips@vger.kernel.org" , "linux-mm@kvack.org" Subject: Re: MIPS/CI20: BUG: Bad page state Thread-Topic: MIPS/CI20: BUG: Bad page state Thread-Index: AQHU+spp/ojd69QglkGCzSQtjt0+I6ZLsnQAgAAT/oCAAAKdAA== Date: Wed, 24 Apr 2019 20:50:31 +0000 Message-ID: <20190424205016.yqtrlygqojii2rs6@pburton-laptop> References: <20190424182012.GA21072@darkstar.musicnaut.iki.fi> <20190424192922.ilnn3oxc7ryzhd3l@pburton-laptop> <20190424204055.GB21072@darkstar.musicnaut.iki.fi> In-Reply-To: <20190424204055.GB21072@darkstar.musicnaut.iki.fi> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: BYAPR11CA0089.namprd11.prod.outlook.com (2603:10b6:a03:f4::30) To MWHPR2201MB1277.namprd22.prod.outlook.com (2603:10b6:301:24::17) user-agent: NeoMutt/20180716 authentication-results: spf=none (sender IP is ) smtp.mailfrom=pburton@wavecomp.com; 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received-spf: None (protection.outlook.com: wavecomp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: i3rqxhW0EHmzBxsVG6+9aqwqopMU2M5qw2XRApmJUTOMyqK8VbsmSBZDn286VvI8tPFp81SzKScmd7uEEfnbP6jwQAfXj/OCDtcjRIxHsBprrtZ8U3+TtTOhY+IXL/0OsJkv2ZenQ+dckXNc0NU8Xy/B1iC+FhAFRkWNklDn+ccTFRnvlFUMcWoxCP1QJk7r31wktPQ4TIkKySRiI+4RFsh4baM8rh/rsOlzqBnf/rz9McT8FjCk1O02DrDUhVHVnYPLWZZomDtNkw3bo86KFmehK/l6upUpNgMxzvUKtfzNOb/OT7VEXKJ6G7/1qi5+9JBbUF7KxTaya7DVAPaoEAmosL4ET6M8JNk6dJsyb1PGndg99Ulgs9zbc2B+2Re2Hjtu1F7AseOso94RkM6O6BNjz/xo2U+VQiQIUOSHjTU= Content-Type: text/plain; charset="us-ascii" Content-ID: <792F3D94E681F64898B3F8D1982535F6@namprd22.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: mips.com X-MS-Exchange-CrossTenant-Network-Message-Id: fdbfb9d3-42c4-48c6-330d-08d6c8f67d86 X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Apr 2019 20:50:31.5602 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 463607d3-1db3-40a0-8a29-970c56230104 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR2201MB1040 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Hi Aaro, On Wed, Apr 24, 2019 at 11:40:55PM +0300, Aaro Koskinen wrote: > On Wed, Apr 24, 2019 at 07:29:29PM +0000, Paul Burton wrote: > > On Wed, Apr 24, 2019 at 09:20:12PM +0300, Aaro Koskinen wrote: > > > I have been trying to get GCC bootstrap to pass on CI20 board, but it > > > seems to always crash. Today, I finally got around connecting the ser= ial > > > console to see why, and it logged the below BUG. > > >=20 > > > I wonder if this is an actual bug, or is the hardware faulty? > > >=20 > > > FWIW, this is 32-bit board with 1 GB RAM. The rootfs is on MMC, as we= ll > > > as 2 GB + 2 GB swap files. > > >=20 > > > Kernel config is at the end of the mail. > >=20 > > I'd bet on memory corruption, though not necessarily faulty hardware. > >=20 > > Unfortunately memory corruption on Ci20 boards isn't uncommon... Someon= e > > did make some tweaks to memory timings configured in the DDR controller > > which improved things for them a while ago: > >=20 > > https://github.com/MIPS/CI20_u-boot/pull/18 > >=20 > > Would you be up for testing with those tweaks? I'd be happy to help wit= h > > updating U-Boot if needed. >=20 > Thanks, I wasn't aware of this, and seems like it could help. >=20 > I guess instructions here are valid, > i.e. I can use MMC/SD card to re-flash the U-boot without the risk of > bricking the board, if I understood correctly? Yes that's correct. It's difficult to impossible to totally brick the board, given the ability to boot from SD or USB & rewrite the NAND. One option would be to just build the new U-Boot for SD boot, and leave your NAND U-Boot entirely untouched until/unless you're satisfied that the changes help. > BTW, would it be possible to re-adjust these timings from the kernel side= ? Maybe, I'm really not sure. So long as it can be done without destroying any of the RAM content it would be OK, but I don't know if that's the case. > > Do you know which board revision you have? (Is it square or a funny > > shape, green or purple, and does it have a revision number printed on > > the silkscreen?) >=20 > It's a purple one. Based on quick look all printings are identical to thi= s > one: > https://images.anandtech.com/doci/8958/purple%20ci20_smaller_678x452.jpg OK good to know - so it's a revision B board, which changed from Hynix to Samsung DDR: https://elinux.org/CI20_Hardware#Board_Revisions_and_changes That's also the revision Gabriele who submitted the U-Boot pull request linked above has. Thanks, Paul