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[62.142.5.108]) by mx.google.com with ESMTPS id j18si14825592ljc.29.2019.04.24.13.40.55 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 24 Apr 2019 13:40:55 -0700 (PDT) Received-SPF: neutral (google.com: 62.142.5.108 is neither permitted nor denied by domain of aaro.koskinen@iki.fi) client-ip=62.142.5.108; Authentication-Results: mx.google.com; spf=neutral (google.com: 62.142.5.108 is neither permitted nor denied by domain of aaro.koskinen@iki.fi) smtp.mailfrom=aaro.koskinen@iki.fi; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=iki.fi Received: from darkstar.musicnaut.iki.fi (85-76-5-198-nat.elisa-mobile.fi [85.76.5.198]) by emh02.mail.saunalahti.fi (Postfix) with ESMTP id 51BDE2005E; Wed, 24 Apr 2019 23:40:55 +0300 (EEST) Date: Wed, 24 Apr 2019 23:40:55 +0300 From: Aaro Koskinen To: Paul Burton Cc: "linux-mips@vger.kernel.org" , "linux-mm@kvack.org" Subject: Re: MIPS/CI20: BUG: Bad page state Message-ID: <20190424204055.GB21072@darkstar.musicnaut.iki.fi> References: <20190424182012.GA21072@darkstar.musicnaut.iki.fi> <20190424192922.ilnn3oxc7ryzhd3l@pburton-laptop> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190424192922.ilnn3oxc7ryzhd3l@pburton-laptop> User-Agent: Mutt/1.5.24 (2015-08-30) X-Bogosity: Ham, tests=bogofilter, spamicity=0.000001, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Hi, On Wed, Apr 24, 2019 at 07:29:29PM +0000, Paul Burton wrote: > On Wed, Apr 24, 2019 at 09:20:12PM +0300, Aaro Koskinen wrote: > > I have been trying to get GCC bootstrap to pass on CI20 board, but it > > seems to always crash. Today, I finally got around connecting the serial > > console to see why, and it logged the below BUG. > > > > I wonder if this is an actual bug, or is the hardware faulty? > > > > FWIW, this is 32-bit board with 1 GB RAM. The rootfs is on MMC, as well > > as 2 GB + 2 GB swap files. > > > > Kernel config is at the end of the mail. > > I'd bet on memory corruption, though not necessarily faulty hardware. > > Unfortunately memory corruption on Ci20 boards isn't uncommon... Someone > did make some tweaks to memory timings configured in the DDR controller > which improved things for them a while ago: > > https://github.com/MIPS/CI20_u-boot/pull/18 > > Would you be up for testing with those tweaks? I'd be happy to help with > updating U-Boot if needed. Thanks, I wasn't aware of this, and seems like it could help. I guess instructions here are valid, i.e. I can use MMC/SD card to re-flash the U-boot without the risk of bricking the board, if I understood correctly? BTW, would it be possible to re-adjust these timings from the kernel side? > Do you know which board revision you have? (Is it square or a funny > shape, green or purple, and does it have a revision number printed on > the silkscreen?) It's a purple one. Based on quick look all printings are identical to this one: https://images.anandtech.com/doci/8958/purple%20ci20_smaller_678x452.jpg A.