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[2607:7c80:54:e::133]) by mx.google.com with ESMTPS id v1si18359977pfm.264.2019.02.20.12.59.37 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 20 Feb 2019 12:59:37 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of willy@infradead.org designates 2607:7c80:54:e::133 as permitted sender) client-ip=2607:7c80:54:e::133; Authentication-Results: mx.google.com; dkim=pass header.i=@infradead.org header.s=bombadil.20170209 header.b=mvd53L3S; spf=pass (google.com: best guess record for domain of willy@infradead.org designates 2607:7c80:54:e::133 as permitted sender) smtp.mailfrom=willy@infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20170209; h=In-Reply-To:Content-Type:MIME-Version :References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=505CT9UNmxyARcL8WDsjWWFZGxSMsAWXHGodR+SfaFU=; b=mvd53L3SwTot4baVjZ7KafeGd MLeivB6+Fcx1ohUT8HV5k7jKY2wRrPFdkNN8xC6iiVH4XtlhUC4VYee0diAXvOoLEy1IUQCiBrR5C nHaTdwPVPJ3ifyZ/f7pWmI7J51bRK+wcRLEFVNRjmqo+ZRmw4i6uL9oF7kGFxLJa5zUITjEvV2lUq OwjZz+QUNpLIVhH7AyHrXkPn7yzkLTJp7/ct5699s5Lmb+7dlnIdSL4f7BVwVMk4oQ28Kcr4oYaFs zMt3jZFZXhvamkPIrKpOUvT8EI2h1hPbfPphdtdsLhUxyF1lXp0Na2UfN0kzOhvdO/E1+RwSiuTVv mtyh1dtNA==; Received: from willy by bombadil.infradead.org with local (Exim 4.90_1 #2 (Red Hat Linux)) id 1gwYxm-00036R-7C; Wed, 20 Feb 2019 20:59:30 +0000 Date: Wed, 20 Feb 2019 12:59:30 -0800 From: Matthew Wilcox To: Yu Zhao Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , "Aneesh Kumar K . V" , Andrew Morton , Nick Piggin , Peter Zijlstra , Joel Fernandes , "Kirill A . Shutemov" , Mark Rutland , Ard Biesheuvel , Chintan Pandya , Jun Yao , Laura Abbott , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org Subject: Re: [PATCH v2 1/3] arm64: mm: use appropriate ctors for page tables Message-ID: <20190220205930.GL12668@bombadil.infradead.org> References: <20190214211642.2200-1-yuzhao@google.com> <20190218231319.178224-1-yuzhao@google.com> <863acc9a-53fb-86ad-4521-828ee8d9c222@arm.com> <20190219053205.GA124985@google.com> <8f9b0bfb-b787-fa3e-7322-73a56a618aa8@arm.com> <20190219222828.GA68281@google.com> <20190220202244.GA80497@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190220202244.GA80497@google.com> User-Agent: Mutt/1.9.2 (2017-12-15) X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Wed, Feb 20, 2019 at 01:22:44PM -0700, Yu Zhao wrote: > On Wed, Feb 20, 2019 at 03:57:59PM +0530, Anshuman Khandual wrote: > > Using pgtable_pmd_page_ctor() during PMD level pgtable page allocation > > as suggested in the patch breaks pmd_alloc_one() changes as per the > > previous proposal. Hence we all would need some agreement here. > > > > https://www.spinics.net/lists/arm-kernel/msg701960.html > > A proposal that requires all page tables to go through a same set of > ctors on all archs is not only inefficient (for kernel page tables) > but also infeasible (for arches use kmem for page tables). I've > explained this clearly. > > The generalized page table functions must recognize the differences > on different levels and between user and kernel page tables, and > provide unified api that is capable of handling the differences. The two architectures I'm aware of (s390 and power) which use sub-page allocations for page tables do so by allocating entire pages and then implementing their own allocators. It shouldn't be a huge problem to use a ctor for the pages. We can probably even implement a dtor for them. Oh, another corner-case I've just remembered is x86-32's PAE with four 8-byte entries in the PGD. That should also go away and be replaced with a shared implementation of sub-page allocations which can also be marked as PageTable. Ideally PTEs, PMDs, etc, etc would all be accounted to the individual processes causing them to be allocated. This isn't really feasible with the x86 PGD; by definition there's only one per process. I'm OK with failing to account this 32-byte allocation to the task though. So maybe the pgd_cache can remain separate from the hypothetical unified ppc/s390 code.