From: Matthew Wilcox <willy@infradead.org>
To: Mike Rapoport <rppt@linux.ibm.com>
Cc: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>,
Helge Deller <deller@gmx.de>,
linux-parisc@vger.kernel.org, linux-mm@kvack.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] parisc: use memblock_alloc() instead of custom get_memblock()
Date: Tue, 12 Feb 2019 06:14:18 -0800 [thread overview]
Message-ID: <20190212141418.GM12668@bombadil.infradead.org> (raw)
In-Reply-To: <1549979990-6642-1-git-send-email-rppt@linux.ibm.com>
On Tue, Feb 12, 2019 at 03:59:50PM +0200, Mike Rapoport wrote:
> -static void * __init get_memblock(unsigned long size)
> -{
> - static phys_addr_t search_addr __initdata;
> - phys_addr_t phys;
> -
> - if (!search_addr)
> - search_addr = PAGE_ALIGN(__pa((unsigned long) &_end));
> - search_addr = ALIGN(search_addr, size);
> - while (!memblock_is_region_memory(search_addr, size) ||
> - memblock_is_region_reserved(search_addr, size)) {
> - search_addr += size;
> - }
> - phys = search_addr;
This implies to me that the allocation will be 'size' aligned.
> if (!pmd) {
> - pmd = (pmd_t *) get_memblock(PAGE_SIZE << PMD_ORDER);
> + pmd = memblock_alloc(PAGE_SIZE << PMD_ORDER,
> + SMP_CACHE_BYTES);
So why would this only need to be cacheline aligned? It's pretty common
for hardware to require that pgd/pud/pmd/pte tables be naturally aligned.
> @@ -700,7 +683,10 @@ static void __init pagetable_init(void)
> }
> #endif
>
> - empty_zero_page = get_memblock(PAGE_SIZE);
> + empty_zero_page = memblock_alloc(PAGE_SIZE, SMP_CACHE_BYTES);
... and surely the zero page also needs to be page aligned, by definition.
next prev parent reply other threads:[~2019-02-12 14:14 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-12 13:59 Mike Rapoport
2019-02-12 14:14 ` Matthew Wilcox [this message]
2019-02-12 14:40 ` Mike Rapoport
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