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Date: Fri, 20 Jul 2018 15:31:39 +0300
From: "Kirill A. Shutemov" <kirill@shutemov.name>
Subject: Re: [PATCHv5 07/19] x86/mm: Mask out KeyID bits from page table
 entry pfn
Message-ID: <20180720123139.2k3tze6rrfnkhksx@kshutemo-mobl1>
References: <20180717112029.42378-1-kirill.shutemov@linux.intel.com>
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To: Dave Hansen <dave.hansen@intel.com>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>, Ingo Molnar <mingo@redhat.com>, x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>, "H. Peter Anvin" <hpa@zytor.com>, Tom Lendacky <thomas.lendacky@amd.com>, Kai Huang <kai.huang@linux.intel.com>, Jacob Pan <jacob.jun.pan@linux.intel.com>, linux-kernel@vger.kernel.org, linux-mm@kvack.org

On Thu, Jul 19, 2018 at 07:19:01AM -0700, Dave Hansen wrote:
> On 07/19/2018 02:54 AM, Kirill A. Shutemov wrote:
> > On Wed, Jul 18, 2018 at 04:13:20PM -0700, Dave Hansen wrote:
> >> On 07/17/2018 04:20 AM, Kirill A. Shutemov wrote:
> >>> +	} else {
> >>> +		/*
> >>> +		 * Reset __PHYSICAL_MASK.
> >>> +		 * Maybe needed if there's inconsistent configuation
> >>> +		 * between CPUs.
> >>> +		 */
> >>> +		physical_mask = (1ULL << __PHYSICAL_MASK_SHIFT) - 1;
> >>> +	}
> >> This seems like an appropriate place for a WARN_ON().  Either that, or
> >> axe this code.
> > There's pr_err_once() above in the function.
> 
> Do you mean for the (tme_activate != tme_activate_cpu0) check?
> 
> But that's about double-activating this feature.  This check is about an
> inconsistent configuration between two CPUs which seems totally different.
> 
> Could you explain?

(tme_activate != tme_activate_cpu0) check is about inconsistent
configuration. It checks if MSR's content on the given CPU matches MSR on
CPU0.

-- 
 Kirill A. Shutemov