From: Andi Kleen <ak@linux.intel.com>
To: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Joerg Roedel <joro@8bytes.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@kernel.org>, "H . Peter Anvin" <hpa@zytor.com>,
the arch/x86 maintainers <x86@kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-mm <linux-mm@kvack.org>, Andy Lutomirski <luto@kernel.org>,
Dave Hansen <dave.hansen@intel.com>,
Josh Poimboeuf <jpoimboe@redhat.com>,
Juergen Gross <jgross@suse.com>,
Peter Zijlstra <peterz@infradead.org>,
Borislav Petkov <bp@alien8.de>, Jiri Kosina <jkosina@suse.cz>,
Boris Ostrovsky <boris.ostrovsky@oracle.com>,
Brian Gerst <brgerst@gmail.com>,
David Laight <David.Laight@aculab.com>,
Denys Vlasenko <dvlasenk@redhat.com>,
Eduardo Valentin <eduval@amazon.com>,
Greg KH <gregkh@linuxfoundation.org>,
Will Deacon <will.deacon@arm.com>,
"Liguori, Anthony" <aliguori@amazon.com>,
Daniel Gruss <daniel.gruss@iaik.tugraz.at>,
Hugh Dickins <hughd@google.com>, Kees Cook <keescook@google.com>,
Andrea Arcangeli <aarcange@redhat.com>,
Waim@linux.intel.com
Subject: Re: [PATCH 03/35] x86/entry/32: Load task stack from x86_tss.sp1 in SYSENTER handler
Date: Wed, 18 Apr 2018 17:38:33 -0700 [thread overview]
Message-ID: <20180419003833.GO6694@tassilo.jf.intel.com> (raw)
In-Reply-To: <CA+55aFxKzsPQW4S4esvJY=wb7D3LKBdDDcXoMKJSqcOgnD3FuA@mail.gmail.com>
On Wed, Apr 18, 2018 at 05:02:02PM -0700, Linus Torvalds wrote:
> On Wed, Apr 18, 2018 at 4:26 PM, Andi Kleen <ak@linux.intel.com> wrote:
> >
> > Seems like a hack. Why can't that be stored in a per cpu variable?
>
> It *is* a percpu variable - the whole x86_tss structure is percpu.
>
> I guess it could be a different (separate) percpu variable, but might
> as well use the space we already have allocated.
Would be better/cleaner to use a separate variable instead of reusing
x86 structures like this. Who knows what subtle side effects that
may have eventually.
It will be also easier to understand in the code.
-Andi
next prev parent reply other threads:[~2018-04-19 0:38 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-16 15:24 [PATCH 00/35 v5] PTI support for x32 Joerg Roedel
2018-04-16 15:24 ` [PATCH 01/35] x86/asm-offsets: Move TSS_sp0 and TSS_sp1 to asm-offsets.c Joerg Roedel
2018-04-16 15:24 ` [PATCH 02/35] x86/entry/32: Rename TSS_sysenter_sp0 to TSS_entry_stack Joerg Roedel
2018-04-16 15:24 ` [PATCH 03/35] x86/entry/32: Load task stack from x86_tss.sp1 in SYSENTER handler Joerg Roedel
2018-04-18 23:26 ` Andi Kleen
2018-04-19 0:02 ` Linus Torvalds
2018-04-19 0:38 ` Andi Kleen [this message]
2018-04-19 0:44 ` Andy Lutomirski
2018-04-19 9:01 ` David Laight
2018-04-16 15:24 ` [PATCH 04/35] x86/entry/32: Put ESPFIX code into a macro Joerg Roedel
2018-04-16 15:24 ` [PATCH 05/35] x86/entry/32: Unshare NMI return path Joerg Roedel
2018-04-16 15:24 ` [PATCH 06/35] x86/entry/32: Split off return-to-kernel path Joerg Roedel
2018-04-16 15:24 ` [PATCH 07/35] x86/entry/32: Enter the kernel via trampoline stack Joerg Roedel
2018-04-16 15:24 ` [PATCH 08/35] x86/entry/32: Leave " Joerg Roedel
2018-04-16 15:24 ` [PATCH 09/35] x86/entry/32: Introduce SAVE_ALL_NMI and RESTORE_ALL_NMI Joerg Roedel
2018-04-16 15:24 ` [PATCH 10/35] x86/entry/32: Handle Entry from Kernel-Mode on Entry-Stack Joerg Roedel
2018-04-16 15:24 ` [PATCH 11/35] x86/entry/32: Simplify debug entry point Joerg Roedel
2018-04-16 15:25 ` [PATCH 12/35] x86/32: Use tss.sp1 as cpu_current_top_of_stack Joerg Roedel
2018-04-16 15:25 ` [PATCH 13/35] x86/entry/32: Add PTI cr3 switch to non-NMI entry/exit points Joerg Roedel
2018-04-16 15:25 ` [PATCH 14/35] x86/entry/32: Add PTI cr3 switches to NMI handler code Joerg Roedel
2018-04-16 15:25 ` [PATCH 15/35] x86/pgtable: Rename pti_set_user_pgd to pti_set_user_pgtbl Joerg Roedel
2018-04-16 15:25 ` [PATCH 16/35] x86/pgtable/pae: Unshare kernel PMDs when PTI is enabled Joerg Roedel
2018-04-16 15:25 ` [PATCH 17/35] x86/pgtable/32: Allocate 8k page-tables " Joerg Roedel
2018-04-16 15:25 ` [PATCH 18/35] x86/pgtable: Move pgdp kernel/user conversion functions to pgtable.h Joerg Roedel
2018-04-16 15:25 ` [PATCH 19/35] x86/pgtable: Move pti_set_user_pgtbl() " Joerg Roedel
2018-04-16 15:25 ` [PATCH 20/35] x86/pgtable: Move two more functions from pgtable_64.h " Joerg Roedel
2018-04-16 15:25 ` [PATCH 21/35] x86/mm/pae: Populate valid user PGD entries Joerg Roedel
2018-04-16 15:25 ` [PATCH 22/35] x86/mm/pae: Populate the user page-table with user pgd's Joerg Roedel
2018-04-16 15:25 ` [PATCH 23/35] x86/mm/legacy: " Joerg Roedel
2018-04-16 15:25 ` [PATCH 24/35] x86/mm/pti: Add an overflow check to pti_clone_pmds() Joerg Roedel
2018-04-16 15:25 ` [PATCH 25/35] x86/mm/pti: Define X86_CR3_PTI_PCID_USER_BIT on x86_32 Joerg Roedel
2018-04-16 15:25 ` [PATCH 26/35] x86/mm/pti: Clone CPU_ENTRY_AREA on PMD level " Joerg Roedel
2018-04-16 15:25 ` [PATCH 27/35] x86/mm/dump_pagetables: Define INIT_PGD Joerg Roedel
2018-04-16 15:25 ` [PATCH 28/35] x86/pgtable/pae: Use separate kernel PMDs for user page-table Joerg Roedel
2018-04-16 15:25 ` [PATCH 29/35] x86/ldt: Reserve address-space range on 32 bit for the LDT Joerg Roedel
2018-04-16 15:25 ` [PATCH 30/35] x86/ldt: Define LDT_END_ADDR Joerg Roedel
2018-04-16 15:25 ` [PATCH 31/35] x86/ldt: Split out sanity check in map_ldt_struct() Joerg Roedel
2018-04-16 15:25 ` [PATCH 32/35] x86/ldt: Enable LDT user-mapping for PAE Joerg Roedel
2018-04-16 15:25 ` [PATCH 33/35] x86/pti: Allow CONFIG_PAGE_TABLE_ISOLATION for x86_32 Joerg Roedel
2018-04-16 15:25 ` [PATCH 34/35] x86/mm/pti: Add Warning when booting on a PCID capable CPU Joerg Roedel
2018-04-16 15:25 ` [PATCH 35/35] x86/entry/32: Add debug code to check entry/exit cr3 Joerg Roedel
2018-04-16 15:32 ` [PATCH 00/35 v5] PTI support for x32 Linus Torvalds
2018-04-16 16:01 ` Joerg Roedel
2018-04-16 16:13 ` Linus Torvalds
2018-04-18 7:35 ` Joerg Roedel
2018-04-16 17:57 ` H. Peter Anvin
-- strict thread matches above, loose matches on Subject: below --
2018-03-16 19:29 [PATCH 00/35 v4] " Joerg Roedel
2018-03-16 19:29 ` [PATCH 03/35] x86/entry/32: Load task stack from x86_tss.sp1 in SYSENTER handler Joerg Roedel
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