From: Matthew Wilcox <willy@infradead.org>
To: John Hubbard <jhubbard@nvidia.com>
Cc: Jerome Glisse <jglisse@redhat.com>,
christian.koenig@amd.com, dri-devel@lists.freedesktop.org,
nouveau@lists.freedesktop.org,
Evgeny Baskakov <ebaskakov@nvidia.com>,
linux-mm@kvack.org, Ralph Campbell <rcampbell@nvidia.com>,
Felix Kuehling <felix.kuehling@amd.com>,
"Bridgman, John" <John.Bridgman@amd.com>
Subject: Re: [RFC PATCH 00/13] SVM (share virtual memory) with HMM in nouveau
Date: Tue, 13 Mar 2018 06:29:40 -0700 [thread overview]
Message-ID: <20180313132940.GB3304@bombadil.infradead.org> (raw)
In-Reply-To: <39139ff7-76ad-960c-53f6-46b57525b733@nvidia.com>
On Mon, Mar 12, 2018 at 11:14:47PM -0700, John Hubbard wrote:
> Yes, on NVIDIA GPUs, the Host/FIFO unit is limited to 40-bit addresses, so
> things such as the following need to be below (1 << 40), and also accessible
> to both CPU (user space) and GPU hardware.
> -- command buffers (CPU user space driver fills them, GPU consumes them),
> -- semaphores (here, a GPU-centric term, rather than OS-type: these are
> memory locations that, for example, the GPU hardware might write to, in
> order to indicate work completion; there are other uses as well),
> -- a few other things most likely (this is not a complete list).
Is that a 40-bit virtual address limit or physical address limit? I'm
no longer sure who is addressing what memory through what mechanism ;-)
next prev parent reply other threads:[~2018-03-13 13:29 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-10 3:21 jglisse
2018-03-10 3:21 ` [RFC PATCH 01/13] drm/nouveau/vmm: enable page table iterator over non populated range jglisse
2018-03-10 3:21 ` [RFC PATCH 02/13] drm/nouveau/core/memory: add some useful accessor macros jglisse
2018-03-10 3:21 ` [RFC PATCH 03/13] drm/nouveau/core: define engine for handling replayable faults jglisse
2018-03-10 3:21 ` [RFC PATCH 04/13] drm/nouveau/mmu/gp100: allow gcc/tex to generate " jglisse
2018-03-10 3:21 ` [RFC PATCH 05/13] drm/nouveau/mc/gp100-: handle replayable fault interrupt jglisse
2018-03-10 3:21 ` [RFC PATCH 06/13] drm/nouveau/fault/gp100: initial implementation of MaxwellFaultBufferA jglisse
2018-03-10 3:21 ` [RFC PATCH 07/13] drm/nouveau: special mapping method for HMM jglisse
2018-03-10 3:21 ` [RFC PATCH 08/13] drm/nouveau: special mapping method for HMM (user interface) jglisse
2018-03-10 3:21 ` [RFC PATCH 09/13] drm/nouveau: add SVM through HMM support to nouveau client jglisse
2018-03-10 3:21 ` [RFC PATCH 10/13] drm/nouveau: add HMM area creation jglisse
2018-03-10 3:21 ` [RFC PATCH 11/13] drm/nouveau: add HMM area creation user interface jglisse
2018-03-10 3:21 ` [RFC PATCH 12/13] drm/nouveau: HMM area creation helpers for nouveau client jglisse
2018-03-10 3:21 ` [RFC PATCH 13/13] drm/nouveau: HACK FOR HMM AREA jglisse
2018-03-10 15:01 ` [RFC PATCH 00/13] SVM (share virtual memory) with HMM in nouveau Christian König
2018-03-10 17:55 ` Jerome Glisse
2018-03-12 17:30 ` Daniel Vetter
2018-03-12 17:50 ` Jerome Glisse
2018-03-13 6:14 ` John Hubbard
2018-03-13 13:29 ` Matthew Wilcox [this message]
2018-03-13 14:31 ` Jerome Glisse
2018-03-13 15:56 ` Jerome Glisse
2018-03-13 10:46 ` Daniel Vetter
2018-03-12 18:28 ` Felix Kuehling
2018-03-13 14:28 ` Jerome Glisse
2018-03-13 15:32 ` Felix Kuehling
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