From: "Kirill A. Shutemov" <kirill@shutemov.name>
To: Matthew Wilcox <willy@infradead.org>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Ingo Molnar <mingo@redhat.com>,
x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
"H. Peter Anvin" <hpa@zytor.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andy Lutomirski <luto@amacapital.net>,
Borislav Petkov <bp@suse.de>, Andi Kleen <ak@linux.intel.com>,
linux-mm@kvack.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] x86/xen: Allow XEN_PV and XEN_PVH to be enabled with X86_5LEVEL
Date: Fri, 16 Feb 2018 18:00:13 +0300 [thread overview]
Message-ID: <20180216150013.twajic7ewrbacx7m@node.shutemov.name> (raw)
In-Reply-To: <20180216141110.GA10501@bombadil.infradead.org>
On Fri, Feb 16, 2018 at 06:11:10AM -0800, Matthew Wilcox wrote:
> On Fri, Feb 16, 2018 at 02:49:46PM +0300, Kirill A. Shutemov wrote:
> > @@ -38,12 +38,12 @@
> > *
> > */
> >
> > +#define l4_index(x) (((x) >> 39) & 511)
> > #define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
>
> Shouldn't that be
> +#define p4d_index(x) (((x) >> P4D_SHIFT) & (PTRS_PER_P4D-1))
With CONFIG_X86_5LEVEL=y, PTRS_PER_P4D is a varaible, so it won't compile.
With CONFIG_X86_5LEVEL=n, PTRS_PER_P4D is 1, so it's broken.
And I didn't want to mixin p4d here: it's actually top-level page table
in 4-level paging mode.
I guess we can do something like:
#define l4_index(x) (((x) >> P4D_SIFT) & (PTRS_PER_PGD-1))
But to me it's more confusing than couple numbers.
--
Kirill A. Shutemov
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next prev parent reply other threads:[~2018-02-16 15:00 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-16 11:49 [PATCH 0/3] x86/mm/5lvl: Optimize boot-time switching, allow more Xen modes Kirill A. Shutemov
2018-02-16 11:49 ` [PATCH 1/3] x86/xen: Allow XEN_PV and XEN_PVH to be enabled with X86_5LEVEL Kirill A. Shutemov
2018-02-16 14:11 ` Matthew Wilcox
2018-02-16 15:00 ` Kirill A. Shutemov [this message]
2018-02-16 11:49 ` [PATCH 2/3] x86/mm: Redefine some of page table helpers as macros Kirill A. Shutemov
2018-02-16 11:49 ` [PATCH 3/3] x86/mm: Offset boot-time paging mode switching cost Kirill A. Shutemov
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