From: Peter Zijlstra <peterz@infradead.org>
To: Dave Hansen <dave.hansen@intel.com>
Cc: the arch/x86 maintainers <x86@kernel.org>,
Andy Lutomirski <luto@kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
Linux-MM <linux-mm@kvack.org>,
"Kleen, Andi" <andi.kleen@intel.com>,
"Chen, Tim C" <tim.c.chen@intel.com>,
Linus Torvalds <torvalds@linux-foundation.org>
Subject: Re: x86 TLB flushing: INVPCID vs. deferred CR3 write
Date: Wed, 6 Dec 2017 10:37:05 +0100 [thread overview]
Message-ID: <20171206093705.y74zuyexf44sl6n4@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <3062e486-3539-8a1f-5724-16199420be71@intel.com>
On Tue, Dec 05, 2017 at 05:27:31PM -0800, Dave Hansen wrote:
> tl;dr: Kernels with pagetable isolation using INVPCID compile kernels
> 0.58% faster than using the deferred CR3 write. This tends to say that
> we should leave things as-is and keep using INVPCID, but it's far from
> definitive.
Much appreciated, thanks Dave!
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next prev parent reply other threads:[~2017-12-06 9:37 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-06 1:27 Dave Hansen
2017-12-06 9:37 ` Peter Zijlstra [this message]
2017-12-06 17:33 ` Ingo Molnar
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