From: Ingo Molnar <mingo@kernel.org>
To: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
"H. Peter Anvin" <hpa@zytor.com>,
Andy Lutomirski <luto@amacapital.net>,
Cyrill Gorcunov <gorcunov@openvz.org>,
Borislav Petkov <bp@suse.de>, Andi Kleen <ak@linux.intel.com>,
linux-mm@kvack.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/4] x86/boot/compressed/64: Introduce place_trampoline()
Date: Fri, 10 Nov 2017 10:29:33 +0100 [thread overview]
Message-ID: <20171110092933.gt4f3ofhjl4fpuqt@gmail.com> (raw)
In-Reply-To: <20171101115503.18358-4-kirill.shutemov@linux.intel.com>
* Kirill A. Shutemov <kirill.shutemov@linux.intel.com> wrote:
> --- a/arch/x86/boot/compressed/head_64.S
> +++ b/arch/x86/boot/compressed/head_64.S
> @@ -315,6 +315,18 @@ ENTRY(startup_64)
> * The first step is go into compatibility mode.
> */
>
> + /*
> + * Find suitable place for trampoline and populate it.
> + * The address will be stored in RCX.
> + *
> + * RSI holds real mode data and need to be preserved across
> + * a function call.
> + */
> + pushq %rsi
> + call place_trampoline
> + popq %rsi
> + movq %rax, %rcx
> +
> /* Clear additional page table */
> leaq lvl5_pgtable(%rbx), %rdi
> xorq %rax, %rax
So in the final version of this code we now have:
pushq %rsi
call need_to_enabled_l5
popq %rsi
/* If need_to_enabled_l5() returned zero, we're done here. */
cmpq $0, %rax
je lvl5
/*
* At this point we are in long mode with 4-level paging enabled,
* but we want to enable 5-level paging.
*
* The problem is that we cannot do it directly. Setting LA57 in
* long mode would trigger #GP. So we need to switch off long mode
* first.
*
* We use trampoline in lower memory to handle situation when
* bootloader put the kernel image above 4G.
*
* The first step is go into compatibility mode.
*/
/*
* Find suitable place for trampoline and populate it.
* The address will be stored in RCX.
*
* RSI holds real mode data and need to be preserved across
* a function call.
*/
pushq %rsi
call place_trampoline
popq %rsi
movq %rax, %rcx
Firstly, the 'need_to_enabled_l5' name sucks because it includes a typo, but also
because the prefix is way too generic.
Something like:
l5_paging_required()
would read a lot better - and would also provide a namespace for all L5 paging
related functions.
Secondly, couldn't this be combined into a single .c function, named accordingly:
l5_paging_prepare()
which would return true if L5 paging is available and should be enabled. In this
case the trampoline copying function would be called in C, by l5_paging_prepare().
This further reduces the amount of assembly code.
Thanks,
Ingo
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next prev parent reply other threads:[~2017-11-10 9:29 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-01 11:54 [PATCH 0/4] x86: 5-level related changes into decompression code Kirill A. Shutemov
2017-11-01 11:55 ` [PATCH 1/4] x86/boot/compressed/64: Compile pagetable.c unconditionally Kirill A. Shutemov
2017-11-10 9:12 ` Ingo Molnar
2017-11-10 9:25 ` Kirill A. Shutemov
2017-11-01 11:55 ` [PATCH 2/4] x86/boot/compressed/64: Detect and handle 5-level paging at boot-time Kirill A. Shutemov
2017-11-10 9:13 ` Ingo Molnar
2017-11-01 11:55 ` [PATCH 3/4] x86/boot/compressed/64: Introduce place_trampoline() Kirill A. Shutemov
2017-11-10 9:14 ` Ingo Molnar
2017-11-10 9:52 ` Kirill A. Shutemov
2017-11-10 9:17 ` Ingo Molnar
2017-11-10 9:28 ` Ingo Molnar
2017-11-10 9:55 ` Kirill A. Shutemov
2017-11-10 12:46 ` Ingo Molnar
2017-11-10 9:29 ` Ingo Molnar [this message]
2017-11-10 9:57 ` Kirill A. Shutemov
2017-11-01 11:55 ` [PATCH 4/4] x86/boot/compressed/64: Handle 5-level paging boot if kernel is above 4G Kirill A. Shutemov
-- strict thread matches above, loose matches on Subject: below --
2017-10-20 19:59 [PATCH 0/4] Boot-time switching between 4- and 5-level paging for 4.15, Part 2 Kirill A. Shutemov
2017-10-20 19:59 ` [PATCH 3/4] x86/boot/compressed/64: Introduce place_trampoline() Kirill A. Shutemov
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