From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-f200.google.com (mail-wr0-f200.google.com [209.85.128.200]) by kanga.kvack.org (Postfix) with ESMTP id 763806B0279 for ; Wed, 31 May 2017 05:16:01 -0400 (EDT) Received: by mail-wr0-f200.google.com with SMTP id 6so1412299wrb.15 for ; Wed, 31 May 2017 02:16:01 -0700 (PDT) Received: from mail.skyhub.de (mail.skyhub.de. [5.9.137.197]) by mx.google.com with ESMTP id o23si16469120wra.77.2017.05.31.02.16.00 for ; Wed, 31 May 2017 02:16:00 -0700 (PDT) Date: Wed, 31 May 2017 11:15:53 +0200 From: Borislav Petkov Subject: Re: [PATCH v5 32/32] x86/mm: Add support to make use of Secure Memory Encryption Message-ID: <20170531091553.jwqcwkfivmmhndwv@pd.tnic> References: <20170418211612.10190.82788.stgit@tlendack-t1.amdoffice.net> <20170418212223.10190.85121.stgit@tlendack-t1.amdoffice.net> <20170519113005.3f5kwzg4pgh7j6a5@pd.tnic> <20170519201651.dhayf2pwjlsnouz4@treble> <1ac40d18-a8b2-94eb-35ed-c30768667be8@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1ac40d18-a8b2-94eb-35ed-c30768667be8@amd.com> Sender: owner-linux-mm@kvack.org List-ID: To: Tom Lendacky Cc: Josh Poimboeuf , linux-arch@vger.kernel.org, linux-efi@vger.kernel.org, kvm@vger.kernel.org, linux-doc@vger.kernel.org, x86@kernel.org, kexec@lists.infradead.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, linux-mm@kvack.org, iommu@lists.linux-foundation.org, Rik van Riel , Radim =?utf-8?B?S3LEjW3DocWZ?= , Toshimitsu Kani , Arnd Bergmann , Jonathan Corbet , Matt Fleming , "Michael S. Tsirkin" , Joerg Roedel , Konrad Rzeszutek Wilk , Paolo Bonzini , Larry Woodman , Brijesh Singh , Ingo Molnar , Andy Lutomirski , "H. Peter Anvin" , Andrey Ryabinin , Alexander Potapenko , Dave Young , Thomas Gleixner , Dmitry Vyukov On Tue, May 30, 2017 at 10:48:27AM -0500, Tom Lendacky wrote: > I'll look at doing that instead of removing the support for the whole > file. Right, so I don't think the stack protector is even ready that early - we do set it up later: /* Set up %gs. * * The base of %gs always points to the bottom of the irqstack * union. If the stack protector canary is enabled, it is * located at %gs:40. Note that, on SMP, the boot cpu uses * init data section till per cpu areas are set up. */ movl $MSR_GS_BASE,%ecx movl initial_gs(%rip),%eax movl initial_gs+4(%rip),%edx wrmsr so I think marking the function "no-stack-protector" is the only option right now. We can always look at fixing that later. -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply. -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org