From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
To: Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Arnd Bergmann <arnd@arndb.de>,
"H. Peter Anvin" <hpa@zytor.com>
Cc: Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Andy Lutomirski <luto@amacapital.net>,
Michal Hocko <mhocko@suse.com>,
linux-arch@vger.kernel.org, linux-mm@kvack.org,
linux-kernel@vger.kernel.org,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Subject: [PATCH 03/26] x86/gup: add 5-level paging support
Date: Mon, 13 Mar 2017 08:49:57 +0300 [thread overview]
Message-ID: <20170313055020.69655-4-kirill.shutemov@linux.intel.com> (raw)
In-Reply-To: <20170313055020.69655-1-kirill.shutemov@linux.intel.com>
It's simply extension for one more page table level.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
---
arch/x86/mm/gup.c | 33 +++++++++++++++++++++++++++------
1 file changed, 27 insertions(+), 6 deletions(-)
diff --git a/arch/x86/mm/gup.c b/arch/x86/mm/gup.c
index 1f3b6ef105cd..456dfdfd2249 100644
--- a/arch/x86/mm/gup.c
+++ b/arch/x86/mm/gup.c
@@ -76,9 +76,9 @@ static void undo_dev_pagemap(int *nr, int nr_start, struct page **pages)
}
/*
- * 'pteval' can come from a pte, pmd or pud. We only check
+ * 'pteval' can come from a pte, pmd, pud or p4d. We only check
* _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the
- * same value on all 3 types.
+ * same value on all 4 types.
*/
static inline int pte_allows_gup(unsigned long pteval, int write)
{
@@ -295,13 +295,13 @@ static noinline int gup_huge_pud(pud_t pud, unsigned long addr,
return 1;
}
-static int gup_pud_range(pgd_t pgd, unsigned long addr, unsigned long end,
+static int gup_pud_range(p4d_t p4d, unsigned long addr, unsigned long end,
int write, struct page **pages, int *nr)
{
unsigned long next;
pud_t *pudp;
- pudp = pud_offset(&pgd, addr);
+ pudp = pud_offset(&p4d, addr);
do {
pud_t pud = *pudp;
@@ -320,6 +320,27 @@ static int gup_pud_range(pgd_t pgd, unsigned long addr, unsigned long end,
return 1;
}
+static int gup_p4d_range(pgd_t pgd, unsigned long addr, unsigned long end,
+ int write, struct page **pages, int *nr)
+{
+ unsigned long next;
+ p4d_t *p4dp;
+
+ p4dp = p4d_offset(&pgd, addr);
+ do {
+ p4d_t p4d = *p4dp;
+
+ next = p4d_addr_end(addr, end);
+ if (p4d_none(p4d))
+ return 0;
+ BUILD_BUG_ON(p4d_large(p4d));
+ if (!gup_pud_range(p4d, addr, next, write, pages, nr))
+ return 0;
+ } while (p4dp++, addr = next, addr != end);
+
+ return 1;
+}
+
/*
* Like get_user_pages_fast() except its IRQ-safe in that it won't fall
* back to the regular GUP.
@@ -368,7 +389,7 @@ int __get_user_pages_fast(unsigned long start, int nr_pages, int write,
next = pgd_addr_end(addr, end);
if (pgd_none(pgd))
break;
- if (!gup_pud_range(pgd, addr, next, write, pages, &nr))
+ if (!gup_p4d_range(pgd, addr, next, write, pages, &nr))
break;
} while (pgdp++, addr = next, addr != end);
local_irq_restore(flags);
@@ -440,7 +461,7 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
next = pgd_addr_end(addr, end);
if (pgd_none(pgd))
goto slow;
- if (!gup_pud_range(pgd, addr, next, write, pages, &nr))
+ if (!gup_p4d_range(pgd, addr, next, write, pages, &nr))
goto slow;
} while (pgdp++, addr = next, addr != end);
local_irq_enable();
--
2.11.0
--
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next prev parent reply other threads:[~2017-03-13 5:50 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-13 5:49 [PATCH 00/26] x86: 5-level paging enabling for v4.12 Kirill A. Shutemov
2017-03-13 5:49 ` [PATCH 01/26] x86: basic changes into headers for 5-level paging Kirill A. Shutemov
2017-03-13 5:49 ` [PATCH 02/26] x86: trivial portion of 5-level paging conversion Kirill A. Shutemov
2017-03-13 5:49 ` Kirill A. Shutemov [this message]
2017-03-13 5:49 ` [PATCH 04/26] x86/ident_map: add 5-level paging support Kirill A. Shutemov
2017-03-13 5:49 ` [PATCH 05/26] x86/mm: add support of p4d_t in vmalloc_fault() Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 06/26] x86/power: support p4d_t in hibernate code Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 07/26] x86/kexec: support p4d_t Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 08/26] x86/efi: handle p4d in EFI pagetables Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 09/26] x86/mm/pat: handle additional page table Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 10/26] x86/kasan: prepare clear_pgds() to switch to <asm-generic/pgtable-nop4d.h> Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 11/26] x86/xen: convert __xen_pgd_walk() and xen_cleanmfnmap() to support p4d Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 12/26] x86: convert the rest of the code to support p4d_t Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 13/26] x86: detect 5-level paging support Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 14/26] x86/asm: remove __VIRTUAL_MASK_SHIFT==47 assert Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 15/26] x86/mm: define virtual memory map for 5-level paging Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 16/26] x86/paravirt: make paravirt code support " Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 17/26] x86/mm: basic defines/helpers for CONFIG_X86_5LEVEL Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 18/26] x86/dump_pagetables: support 5-level paging Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 19/26] x86/kasan: extend to " Kirill A. Shutemov
2017-03-13 7:25 ` Dmitry Vyukov
2017-03-13 5:50 ` [PATCH 20/26] x86/espfix: " Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 21/26] x86/mm: add support of additional page table level during early boot Kirill A. Shutemov
2017-03-13 7:18 ` Ingo Molnar
2017-04-05 11:36 ` Kirill A. Shutemov
2017-04-05 15:32 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 22/26] x86/mm: add sync_global_pgds() for configuration with 5-level paging Kirill A. Shutemov
2017-03-13 7:22 ` Ingo Molnar
2017-03-13 5:50 ` [PATCH 23/26] x86/mm: make kernel_physical_mapping_init() support " Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 24/26] x86/mm: add support for 5-level paging for KASLR Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 25/26] x86: enable 5-level paging support Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 26/26] x86/mm: allow to have userspace mappings above 47-bits Kirill A. Shutemov
2017-03-17 17:53 ` Aneesh Kumar K.V
2017-03-17 17:57 ` Kirill A. Shutemov
2017-03-19 8:24 ` Aneesh Kumar K.V
2017-03-19 8:26 ` Kirill A. Shutemov
2017-03-20 18:08 ` hpa
2017-03-20 18:38 ` Matthew Wilcox
2017-03-24 8:59 ` Kirill A. Shutemov
2017-03-19 8:55 ` Aneesh Kumar K.V
2017-03-24 9:03 ` Kirill A. Shutemov
2017-03-20 9:15 ` Michael Ellerman
2017-03-20 5:10 ` Aneesh Kumar K.V
2017-03-24 9:04 ` Kirill A. Shutemov
2017-03-24 9:14 ` Aneesh Kumar K.V
2017-03-24 9:30 ` Kirill A. Shutemov
2017-03-13 7:49 ` [PATCH 00/26] x86: 5-level paging enabling for v4.12 Ingo Molnar
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