[mmotm:master 319/413] arch/arm64/kernel/armv8_deprecated.c:359:31: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'aarch32_check_condition'

[kbuild test robot <fengguang.wu@intel.com>]

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tree:   git://git.cmpxchg.org/linux-mmotm.git master
head:   0f654f0e7a2b2fc05d4d5896e09e8048d16d5ed9
commit: 2ec49283a1aa37520eed1b3c8106700e56f61713 [319/413] kprobes: move kprobe declarations to asm-generic/kprobes.h
config: arm64-allyesconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
        wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        git checkout 2ec49283a1aa37520eed1b3c8106700e56f61713
        # save the attached .config to linux build tree
        make.cross ARCH=arm64 

All errors (new ones prefixed by >>):

>> arch/arm64/kernel/armv8_deprecated.c:359:31: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'aarch32_check_condition'
    static unsigned int __kprobes aarch32_check_condition(u32 opcode, u32 psr)
                                  ^~~~~~~~~~~~~~~~~~~~~~~
   arch/arm64/kernel/armv8_deprecated.c: In function 'swp_handler':
>> arch/arm64/kernel/armv8_deprecated.c:386:10: error: implicit declaration of function 'aarch32_check_condition' [-Werror=implicit-function-declaration]
     switch (aarch32_check_condition(instr, regs->pstate)) {
             ^~~~~~~~~~~~~~~~~~~~~~~
   cc1: some warnings being treated as errors

vim +359 arch/arm64/kernel/armv8_deprecated.c

bca8f17f Marc Zyngier  2016-12-01  353  #define ARM_OPCODE_CONDTEST_FAIL   0
bca8f17f Marc Zyngier  2016-12-01  354  #define ARM_OPCODE_CONDTEST_PASS   1
bca8f17f Marc Zyngier  2016-12-01  355  #define ARM_OPCODE_CONDTEST_UNCOND 2
bca8f17f Marc Zyngier  2016-12-01  356  
2af3ec08 David A. Long 2016-07-08  357  #define	ARM_OPCODE_CONDITION_UNCOND	0xf
2af3ec08 David A. Long 2016-07-08  358  
2af3ec08 David A. Long 2016-07-08 @359  static unsigned int __kprobes aarch32_check_condition(u32 opcode, u32 psr)
2af3ec08 David A. Long 2016-07-08  360  {
2af3ec08 David A. Long 2016-07-08  361  	u32 cc_bits  = opcode >> 28;
2af3ec08 David A. Long 2016-07-08  362  
2af3ec08 David A. Long 2016-07-08  363  	if (cc_bits != ARM_OPCODE_CONDITION_UNCOND) {
2af3ec08 David A. Long 2016-07-08  364  		if ((*aarch32_opcode_cond_checks[cc_bits])(psr))
2af3ec08 David A. Long 2016-07-08  365  			return ARM_OPCODE_CONDTEST_PASS;
2af3ec08 David A. Long 2016-07-08  366  		else
2af3ec08 David A. Long 2016-07-08  367  			return ARM_OPCODE_CONDTEST_FAIL;
2af3ec08 David A. Long 2016-07-08  368  	}
2af3ec08 David A. Long 2016-07-08  369  	return ARM_OPCODE_CONDTEST_UNCOND;
2af3ec08 David A. Long 2016-07-08  370  }
2af3ec08 David A. Long 2016-07-08  371  
bd35a4ad Punit Agrawal 2014-11-18  372  /*
bd35a4ad Punit Agrawal 2014-11-18  373   * swp_handler logs the id of calling process, dissects the instruction, sanity
bd35a4ad Punit Agrawal 2014-11-18  374   * checks the memory location, calls emulate_swpX for the actual operation and
bd35a4ad Punit Agrawal 2014-11-18  375   * deals with fixup/error handling before returning
bd35a4ad Punit Agrawal 2014-11-18  376   */
bd35a4ad Punit Agrawal 2014-11-18  377  static int swp_handler(struct pt_regs *regs, u32 instr)
bd35a4ad Punit Agrawal 2014-11-18  378  {
bd35a4ad Punit Agrawal 2014-11-18  379  	u32 destreg, data, type, address = 0;
bd35a4ad Punit Agrawal 2014-11-18  380  	int rn, rt2, res = 0;
bd35a4ad Punit Agrawal 2014-11-18  381  
bd35a4ad Punit Agrawal 2014-11-18  382  	perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->pc);
bd35a4ad Punit Agrawal 2014-11-18  383  
bd35a4ad Punit Agrawal 2014-11-18  384  	type = instr & TYPE_SWPB;
bd35a4ad Punit Agrawal 2014-11-18  385  
2af3ec08 David A. Long 2016-07-08 @386  	switch (aarch32_check_condition(instr, regs->pstate)) {
bd35a4ad Punit Agrawal 2014-11-18  387  	case ARM_OPCODE_CONDTEST_PASS:
bd35a4ad Punit Agrawal 2014-11-18  388  		break;
bd35a4ad Punit Agrawal 2014-11-18  389  	case ARM_OPCODE_CONDTEST_FAIL:

:::::: The code at line 359 was first introduced by commit
:::::: 2af3ec08b414ceb9c32fad2bb0f87252f3f18de8 arm64: add conditional instruction simulation support

:::::: TO: David A. Long <dave.long@linaro.org>
:::::: CC: Catalin Marinas <catalin.marinas@arm.com>

---
0-DAY kernel test infrastructure                Open Source Technology Center
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