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Date: Mon, 16 Nov 2015 19:48:13 +0000
From: Russell King - ARM Linux <linux@arm.linux.org.uk>
Subject: Re: [PATCH v2 11/12] ARM: wire up UEFI init and runtime support
Message-ID: <20151116194812.GJ8644@n2100.arm.linux.org.uk>
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To: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "linux-efi@vger.kernel.org" <linux-efi@vger.kernel.org>, Will Deacon <will.deacon@arm.com>, Grant Likely <grant.likely@linaro.org>, Catalin Marinas <catalin.marinas@arm.com>, Mark Rutland <mark.rutland@arm.com>, Leif Lindholm <leif.lindholm@linaro.org>, Roy Franz <roy.franz@linaro.org>, Mark Salter <msalter@redhat.com>, Ryan Harkin <ryan.harkin@linaro.org>, Andrew Morton <akpm@linux-foundation.org>, "linux-mm@kvack.org" <linux-mm@kvack.org>

On Mon, Nov 16, 2015 at 08:04:00PM +0100, Ard Biesheuvel wrote:
> OK. So you mean set TTBR to the zero page, perform the TLB flush and
> only then switch to the new page tables?

Not quite.

If you have global mappings below TASK_SIZE, you would need this
sequence when switching either to or from the UEFI page tables:

- switch to another set of page tables which only map kernel space
  with nothing at all in userspace.
- flush the TLB.
- switch to your target page tables.

As I say in response to one of your other patches, it's probably
much easier to avoid any global mappings below TASK_SIZE.

-- 
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according to speedtest.net.

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