From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pa0-f53.google.com (mail-pa0-f53.google.com [209.85.220.53]) by kanga.kvack.org (Postfix) with ESMTP id B443482F87 for ; Thu, 1 Oct 2015 17:37:58 -0400 (EDT) Received: by pacfv12 with SMTP id fv12so87601568pac.2 for ; Thu, 01 Oct 2015 14:37:58 -0700 (PDT) Received: from mga09.intel.com (mga09.intel.com. [134.134.136.24]) by mx.google.com with ESMTP id ix9si11598616pbd.221.2015.10.01.14.37.57 for ; Thu, 01 Oct 2015 14:37:57 -0700 (PDT) Date: Fri, 2 Oct 2015 05:37:57 +0800 From: kbuild test robot Subject: [stable:linux-3.14.y 1941/3276] arch/mips/kernel/r4k_fpu.S:48: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f1,256+8($4)' Message-ID: <201510020551.GHZ8ozY3%fengguang.wu@intel.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="2fHTh5uZTiUOsy+g" Content-Disposition: inline Sender: owner-linux-mm@kvack.org List-ID: To: Sasha Levin Cc: kbuild-all@01.org, Greg Kroah-Hartman , Andrew Morton , Linux Memory Management List --2fHTh5uZTiUOsy+g Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi Sasha, First bad commit (maybe != root cause): tree: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git linux-3.14.y head: 99e64c4a808c55cb173b69dc21d28a4420eb22c5 commit: 017ff97daa4a7892181a4dd315c657108419da0c [1941/3276] kernel: add support for gcc 5 config: mips-fuloong2e_defconfig (attached as .config) reproduce: wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout 017ff97daa4a7892181a4dd315c657108419da0c # save the attached .config to linux build tree make.cross ARCH=mips All error/warnings (new ones prefixed by >>): arch/mips/kernel/r4k_fpu.S: Assembler messages: >> arch/mips/kernel/r4k_fpu.S:48: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f1,256+8($4)' >> arch/mips/kernel/r4k_fpu.S:49: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f3,256+24($4)' >> arch/mips/kernel/r4k_fpu.S:50: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f5,256+40($4)' >> arch/mips/kernel/r4k_fpu.S:51: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f7,256+56($4)' >> arch/mips/kernel/r4k_fpu.S:52: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f9,256+72($4)' >> arch/mips/kernel/r4k_fpu.S:53: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f11,256+88($4)' >> arch/mips/kernel/r4k_fpu.S:54: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f13,256+104($4)' >> arch/mips/kernel/r4k_fpu.S:55: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f15,256+120($4)' >> arch/mips/kernel/r4k_fpu.S:56: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f17,256+136($4)' >> arch/mips/kernel/r4k_fpu.S:57: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f19,256+152($4)' >> arch/mips/kernel/r4k_fpu.S:58: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f21,256+168($4)' >> arch/mips/kernel/r4k_fpu.S:59: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f23,256+184($4)' >> arch/mips/kernel/r4k_fpu.S:60: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f25,256+200($4)' >> arch/mips/kernel/r4k_fpu.S:61: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f27,256+216($4)' >> arch/mips/kernel/r4k_fpu.S:62: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f29,256+232($4)' >> arch/mips/kernel/r4k_fpu.S:63: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f31,256+248($4)' arch/mips/kernel/r4k_fpu.S:68: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f0,256+0($4)' arch/mips/kernel/r4k_fpu.S:69: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f2,256+16($4)' arch/mips/kernel/r4k_fpu.S:70: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f4,256+32($4)' arch/mips/kernel/r4k_fpu.S:71: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f6,256+48($4)' arch/mips/kernel/r4k_fpu.S:72: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f8,256+64($4)' arch/mips/kernel/r4k_fpu.S:73: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f10,256+80($4)' arch/mips/kernel/r4k_fpu.S:74: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f12,256+96($4)' arch/mips/kernel/r4k_fpu.S:75: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f14,256+112($4)' arch/mips/kernel/r4k_fpu.S:76: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f16,256+128($4)' arch/mips/kernel/r4k_fpu.S:77: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f18,256+144($4)' arch/mips/kernel/r4k_fpu.S:78: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f20,256+160($4)' arch/mips/kernel/r4k_fpu.S:79: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f22,256+176($4)' arch/mips/kernel/r4k_fpu.S:80: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f24,256+192($4)' arch/mips/kernel/r4k_fpu.S:81: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f26,256+208($4)' arch/mips/kernel/r4k_fpu.S:82: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f28,256+224($4)' arch/mips/kernel/r4k_fpu.S:83: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f30,256+240($4)' arch/mips/kernel/r4k_fpu.S:100: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f1,272+8($4)' arch/mips/kernel/r4k_fpu.S:101: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f3,272+24($4)' arch/mips/kernel/r4k_fpu.S:102: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f5,272+40($4)' arch/mips/kernel/r4k_fpu.S:103: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f7,272+56($4)' arch/mips/kernel/r4k_fpu.S:104: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f9,272+72($4)' arch/mips/kernel/r4k_fpu.S:105: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f11,272+88($4)' arch/mips/kernel/r4k_fpu.S:106: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f13,272+104($4)' arch/mips/kernel/r4k_fpu.S:107: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f15,272+120($4)' arch/mips/kernel/r4k_fpu.S:108: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f17,272+136($4)' arch/mips/kernel/r4k_fpu.S:109: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f19,272+152($4)' arch/mips/kernel/r4k_fpu.S:110: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f21,272+168($4)' arch/mips/kernel/r4k_fpu.S:111: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f23,272+184($4)' arch/mips/kernel/r4k_fpu.S:112: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f25,272+200($4)' arch/mips/kernel/r4k_fpu.S:113: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f27,272+216($4)' arch/mips/kernel/r4k_fpu.S:114: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f29,272+232($4)' arch/mips/kernel/r4k_fpu.S:115: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f31,272+248($4)' arch/mips/kernel/r4k_fpu.S:118: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f0,272+0($4)' arch/mips/kernel/r4k_fpu.S:119: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f2,272+16($4)' arch/mips/kernel/r4k_fpu.S:120: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f4,272+32($4)' arch/mips/kernel/r4k_fpu.S:121: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f6,272+48($4)' arch/mips/kernel/r4k_fpu.S:122: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f8,272+64($4)' arch/mips/kernel/r4k_fpu.S:123: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f10,272+80($4)' arch/mips/kernel/r4k_fpu.S:124: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f12,272+96($4)' arch/mips/kernel/r4k_fpu.S:125: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f14,272+112($4)' arch/mips/kernel/r4k_fpu.S:126: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f16,272+128($4)' arch/mips/kernel/r4k_fpu.S:127: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f18,272+144($4)' arch/mips/kernel/r4k_fpu.S:128: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f20,272+160($4)' arch/mips/kernel/r4k_fpu.S:129: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f22,272+176($4)' arch/mips/kernel/r4k_fpu.S:130: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f24,272+192($4)' arch/mips/kernel/r4k_fpu.S:131: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f26,272+208($4)' arch/mips/kernel/r4k_fpu.S:132: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f28,272+224($4)' arch/mips/kernel/r4k_fpu.S:133: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f30,272+240($4)' >> arch/mips/kernel/r4k_fpu.S:160: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f1,256+8($4)' >> arch/mips/kernel/r4k_fpu.S:161: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f3,256+24($4)' >> arch/mips/kernel/r4k_fpu.S:162: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f5,256+40($4)' >> arch/mips/kernel/r4k_fpu.S:163: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f7,256+56($4)' -- arch/mips/kernel/r4k_switch.S: Assembler messages: arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f1,1048($4)' arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f3,1064($4)' arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f5,1080($4)' arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f7,1096($4)' arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f9,1112($4)' arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f11,1128($4)' arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f13,1144($4)' arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f15,1160($4)' arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f17,1176($4)' arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f19,1192($4)' arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f21,1208($4)' arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f23,1224($4)' arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f25,1240($4)' arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f27,1256($4)' arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f29,1272($4)' arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f31,1288($4)' >> arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f0,1040($4)' >> arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f2,1056($4)' >> arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f4,1072($4)' >> arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f6,1088($4)' >> arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f8,1104($4)' >> arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f10,1120($4)' >> arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f12,1136($4)' >> arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f14,1152($4)' >> arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f16,1168($4)' >> arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f18,1184($4)' >> arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f20,1200($4)' >> arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f22,1216($4)' >> arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f24,1232($4)' >> arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f26,1248($4)' >> arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f28,1264($4)' >> arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f30,1280($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f1,1048($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f3,1064($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f5,1080($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f7,1096($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f9,1112($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f11,1128($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f13,1144($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f15,1160($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f17,1176($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f19,1192($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f21,1208($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f23,1224($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f25,1240($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f27,1256($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f29,1272($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: mips64r2 (mips64r2) `sdc1 $f31,1288($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f0,1040($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f2,1056($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f4,1072($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f6,1088($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f8,1104($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f10,1120($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f12,1136($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f14,1152($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f16,1168($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f18,1184($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f20,1200($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f22,1216($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f24,1232($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f26,1248($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f28,1264($4)' arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: loongson2e (mips3) `sdc1 $f30,1280($4)' arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: mips64r2 (mips64r2) `ldc1 $f1,1048($4)' arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: mips64r2 (mips64r2) `ldc1 $f3,1064($4)' arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: mips64r2 (mips64r2) `ldc1 $f5,1080($4)' arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: mips64r2 (mips64r2) `ldc1 $f7,1096($4)' arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: mips64r2 (mips64r2) `ldc1 $f9,1112($4)' arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: mips64r2 (mips64r2) `ldc1 $f11,1128($4)' arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: mips64r2 (mips64r2) `ldc1 $f13,1144($4)' arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: mips64r2 (mips64r2) `ldc1 $f15,1160($4)' arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: mips64r2 (mips64r2) `ldc1 $f17,1176($4)' arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: mips64r2 (mips64r2) `ldc1 $f19,1192($4)' arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: mips64r2 (mips64r2) `ldc1 $f21,1208($4)' arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: mips64r2 (mips64r2) `ldc1 $f23,1224($4)' arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: mips64r2 (mips64r2) `ldc1 $f25,1240($4)' arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: mips64r2 (mips64r2) `ldc1 $f27,1256($4)' arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: mips64r2 (mips64r2) `ldc1 $f29,1272($4)' arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: mips64r2 (mips64r2) `ldc1 $f31,1288($4)' >> arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: loongson2e (mips3) `ldc1 $f0,1040($4)' >> arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: loongson2e (mips3) `ldc1 $f2,1056($4)' >> arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: loongson2e (mips3) `ldc1 $f4,1072($4)' >> arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: loongson2e (mips3) `ldc1 $f6,1088($4)' vim +48 arch/mips/kernel/r4k_fpu.S 597ce172 Paul Burton 2013-11-22 42 mfc0 t0, CP0_STATUS 597ce172 Paul Burton 2013-11-22 43 sll t0, t0, 5 597ce172 Paul Burton 2013-11-22 44 bgez t0, 1f # skip storing odd if FR=0 597ce172 Paul Burton 2013-11-22 45 nop 597ce172 Paul Burton 2013-11-22 46 #endif ^1da177e Linus Torvalds 2005-04-16 47 /* Store the 16 odd double precision registers */ ^1da177e Linus Torvalds 2005-04-16 @48 EX sdc1 $f1, SC_FPREGS+8(a0) ^1da177e Linus Torvalds 2005-04-16 @49 EX sdc1 $f3, SC_FPREGS+24(a0) ^1da177e Linus Torvalds 2005-04-16 @50 EX sdc1 $f5, SC_FPREGS+40(a0) ^1da177e Linus Torvalds 2005-04-16 @51 EX sdc1 $f7, SC_FPREGS+56(a0) ^1da177e Linus Torvalds 2005-04-16 @52 EX sdc1 $f9, SC_FPREGS+72(a0) ^1da177e Linus Torvalds 2005-04-16 @53 EX sdc1 $f11, SC_FPREGS+88(a0) ^1da177e Linus Torvalds 2005-04-16 @54 EX sdc1 $f13, SC_FPREGS+104(a0) ^1da177e Linus Torvalds 2005-04-16 @55 EX sdc1 $f15, SC_FPREGS+120(a0) ^1da177e Linus Torvalds 2005-04-16 @56 EX sdc1 $f17, SC_FPREGS+136(a0) ^1da177e Linus Torvalds 2005-04-16 @57 EX sdc1 $f19, SC_FPREGS+152(a0) ^1da177e Linus Torvalds 2005-04-16 @58 EX sdc1 $f21, SC_FPREGS+168(a0) ^1da177e Linus Torvalds 2005-04-16 @59 EX sdc1 $f23, SC_FPREGS+184(a0) ^1da177e Linus Torvalds 2005-04-16 @60 EX sdc1 $f25, SC_FPREGS+200(a0) ^1da177e Linus Torvalds 2005-04-16 @61 EX sdc1 $f27, SC_FPREGS+216(a0) ^1da177e Linus Torvalds 2005-04-16 @62 EX sdc1 $f29, SC_FPREGS+232(a0) ^1da177e Linus Torvalds 2005-04-16 @63 EX sdc1 $f31, SC_FPREGS+248(a0) 597ce172 Paul Burton 2013-11-22 64 1: .set pop ^1da177e Linus Torvalds 2005-04-16 65 #endif ^1da177e Linus Torvalds 2005-04-16 66 ^1da177e Linus Torvalds 2005-04-16 67 /* Store the 16 even double precision registers */ ^1da177e Linus Torvalds 2005-04-16 68 EX sdc1 $f0, SC_FPREGS+0(a0) ^1da177e Linus Torvalds 2005-04-16 69 EX sdc1 $f2, SC_FPREGS+16(a0) ^1da177e Linus Torvalds 2005-04-16 70 EX sdc1 $f4, SC_FPREGS+32(a0) ^1da177e Linus Torvalds 2005-04-16 71 EX sdc1 $f6, SC_FPREGS+48(a0) ^1da177e Linus Torvalds 2005-04-16 72 EX sdc1 $f8, SC_FPREGS+64(a0) ^1da177e Linus Torvalds 2005-04-16 73 EX sdc1 $f10, SC_FPREGS+80(a0) ^1da177e Linus Torvalds 2005-04-16 74 EX sdc1 $f12, SC_FPREGS+96(a0) ^1da177e Linus Torvalds 2005-04-16 75 EX sdc1 $f14, SC_FPREGS+112(a0) ^1da177e Linus Torvalds 2005-04-16 76 EX sdc1 $f16, SC_FPREGS+128(a0) ^1da177e Linus Torvalds 2005-04-16 77 EX sdc1 $f18, SC_FPREGS+144(a0) ^1da177e Linus Torvalds 2005-04-16 78 EX sdc1 $f20, SC_FPREGS+160(a0) ^1da177e Linus Torvalds 2005-04-16 79 EX sdc1 $f22, SC_FPREGS+176(a0) ^1da177e Linus Torvalds 2005-04-16 80 EX sdc1 $f24, SC_FPREGS+192(a0) ^1da177e Linus Torvalds 2005-04-16 81 EX sdc1 $f26, SC_FPREGS+208(a0) ^1da177e Linus Torvalds 2005-04-16 82 EX sdc1 $f28, SC_FPREGS+224(a0) ^1da177e Linus Torvalds 2005-04-16 83 EX sdc1 $f30, SC_FPREGS+240(a0) ^1da177e Linus Torvalds 2005-04-16 84 EX sw t1, SC_FPC_CSR(a0) ^1da177e Linus Torvalds 2005-04-16 85 jr ra ^1da177e Linus Torvalds 2005-04-16 86 li v0, 0 # success ^1da177e Linus Torvalds 2005-04-16 87 END(_save_fp_context) ^1da177e Linus Torvalds 2005-04-16 88 ^1da177e Linus Torvalds 2005-04-16 89 #ifdef CONFIG_MIPS32_COMPAT ^1da177e Linus Torvalds 2005-04-16 90 /* Save 32-bit process floating point context */ ^1da177e Linus Torvalds 2005-04-16 91 LEAF(_save_fp_context32) ^1da177e Linus Torvalds 2005-04-16 92 cfc1 t1, fcr31 ^1da177e Linus Torvalds 2005-04-16 93 597ce172 Paul Burton 2013-11-22 94 mfc0 t0, CP0_STATUS 597ce172 Paul Burton 2013-11-22 95 sll t0, t0, 5 597ce172 Paul Burton 2013-11-22 96 bgez t0, 1f # skip storing odd if FR=0 597ce172 Paul Burton 2013-11-22 97 nop 597ce172 Paul Burton 2013-11-22 98 597ce172 Paul Burton 2013-11-22 99 /* Store the 16 odd double precision registers */ 597ce172 Paul Burton 2013-11-22 100 EX sdc1 $f1, SC32_FPREGS+8(a0) 597ce172 Paul Burton 2013-11-22 101 EX sdc1 $f3, SC32_FPREGS+24(a0) 597ce172 Paul Burton 2013-11-22 102 EX sdc1 $f5, SC32_FPREGS+40(a0) 597ce172 Paul Burton 2013-11-22 103 EX sdc1 $f7, SC32_FPREGS+56(a0) 597ce172 Paul Burton 2013-11-22 104 EX sdc1 $f9, SC32_FPREGS+72(a0) 597ce172 Paul Burton 2013-11-22 105 EX sdc1 $f11, SC32_FPREGS+88(a0) 597ce172 Paul Burton 2013-11-22 106 EX sdc1 $f13, SC32_FPREGS+104(a0) 597ce172 Paul Burton 2013-11-22 107 EX sdc1 $f15, SC32_FPREGS+120(a0) 597ce172 Paul Burton 2013-11-22 108 EX sdc1 $f17, SC32_FPREGS+136(a0) 597ce172 Paul Burton 2013-11-22 109 EX sdc1 $f19, SC32_FPREGS+152(a0) 597ce172 Paul Burton 2013-11-22 110 EX sdc1 $f21, SC32_FPREGS+168(a0) 597ce172 Paul Burton 2013-11-22 111 EX sdc1 $f23, SC32_FPREGS+184(a0) 597ce172 Paul Burton 2013-11-22 112 EX sdc1 $f25, SC32_FPREGS+200(a0) 597ce172 Paul Burton 2013-11-22 113 EX sdc1 $f27, SC32_FPREGS+216(a0) 597ce172 Paul Burton 2013-11-22 114 EX sdc1 $f29, SC32_FPREGS+232(a0) 597ce172 Paul Burton 2013-11-22 115 EX sdc1 $f31, SC32_FPREGS+248(a0) 597ce172 Paul Burton 2013-11-22 116 597ce172 Paul Burton 2013-11-22 117 /* Store the 16 even double precision registers */ 597ce172 Paul Burton 2013-11-22 118 1: EX sdc1 $f0, SC32_FPREGS+0(a0) ^1da177e Linus Torvalds 2005-04-16 119 EX sdc1 $f2, SC32_FPREGS+16(a0) ^1da177e Linus Torvalds 2005-04-16 120 EX sdc1 $f4, SC32_FPREGS+32(a0) ^1da177e Linus Torvalds 2005-04-16 121 EX sdc1 $f6, SC32_FPREGS+48(a0) ^1da177e Linus Torvalds 2005-04-16 122 EX sdc1 $f8, SC32_FPREGS+64(a0) ^1da177e Linus Torvalds 2005-04-16 123 EX sdc1 $f10, SC32_FPREGS+80(a0) ^1da177e Linus Torvalds 2005-04-16 124 EX sdc1 $f12, SC32_FPREGS+96(a0) ^1da177e Linus Torvalds 2005-04-16 @125 EX sdc1 $f14, SC32_FPREGS+112(a0) ^1da177e Linus Torvalds 2005-04-16 @126 EX sdc1 $f16, SC32_FPREGS+128(a0) ^1da177e Linus Torvalds 2005-04-16 @127 EX sdc1 $f18, SC32_FPREGS+144(a0) ^1da177e Linus Torvalds 2005-04-16 @128 EX sdc1 $f20, SC32_FPREGS+160(a0) ^1da177e Linus Torvalds 2005-04-16 @129 EX sdc1 $f22, SC32_FPREGS+176(a0) ^1da177e Linus Torvalds 2005-04-16 @130 EX sdc1 $f24, SC32_FPREGS+192(a0) ^1da177e Linus Torvalds 2005-04-16 @131 EX sdc1 $f26, SC32_FPREGS+208(a0) ^1da177e Linus Torvalds 2005-04-16 @132 EX sdc1 $f28, SC32_FPREGS+224(a0) ^1da177e Linus Torvalds 2005-04-16 @133 EX sdc1 $f30, SC32_FPREGS+240(a0) ^1da177e Linus Torvalds 2005-04-16 134 EX sw t1, SC32_FPC_CSR(a0) ^1da177e Linus Torvalds 2005-04-16 135 cfc1 t0, $0 # implementation/version ^1da177e Linus Torvalds 2005-04-16 136 EX sw t0, SC32_FPC_EIR(a0) ^1da177e Linus Torvalds 2005-04-16 137 ^1da177e Linus Torvalds 2005-04-16 138 jr ra ^1da177e Linus Torvalds 2005-04-16 139 li v0, 0 # success ^1da177e Linus Torvalds 2005-04-16 140 END(_save_fp_context32) ^1da177e Linus Torvalds 2005-04-16 141 #endif ^1da177e Linus Torvalds 2005-04-16 142 ^1da177e Linus Torvalds 2005-04-16 143 /* ^1da177e Linus Torvalds 2005-04-16 144 * Restore FPU state: ^1da177e Linus Torvalds 2005-04-16 145 * - fp gp registers ^1da177e Linus Torvalds 2005-04-16 146 * - cp1 status/control register ^1da177e Linus Torvalds 2005-04-16 147 */ ^1da177e Linus Torvalds 2005-04-16 148 LEAF(_restore_fp_context) b616365e Huacai Chen 2014-02-07 149 EX lw t1, SC_FPC_CSR(a0) 597ce172 Paul Burton 2013-11-22 150 f5868f05 Paul Bolle 2014-02-09 151 #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) 597ce172 Paul Burton 2013-11-22 152 .set push f5868f05 Paul Bolle 2014-02-09 153 #ifdef CONFIG_CPU_MIPS32_R2 597ce172 Paul Burton 2013-11-22 154 .set mips64r2 597ce172 Paul Burton 2013-11-22 155 mfc0 t0, CP0_STATUS 597ce172 Paul Burton 2013-11-22 156 sll t0, t0, 5 597ce172 Paul Burton 2013-11-22 157 bgez t0, 1f # skip loading odd if FR=0 597ce172 Paul Burton 2013-11-22 158 nop 597ce172 Paul Burton 2013-11-22 159 #endif ^1da177e Linus Torvalds 2005-04-16 @160 EX ldc1 $f1, SC_FPREGS+8(a0) ^1da177e Linus Torvalds 2005-04-16 @161 EX ldc1 $f3, SC_FPREGS+24(a0) ^1da177e Linus Torvalds 2005-04-16 @162 EX ldc1 $f5, SC_FPREGS+40(a0) ^1da177e Linus Torvalds 2005-04-16 @163 EX ldc1 $f7, SC_FPREGS+56(a0) ^1da177e Linus Torvalds 2005-04-16 @164 EX ldc1 $f9, SC_FPREGS+72(a0) ^1da177e Linus Torvalds 2005-04-16 @165 EX ldc1 $f11, SC_FPREGS+88(a0) ^1da177e Linus Torvalds 2005-04-16 @166 EX ldc1 $f13, SC_FPREGS+104(a0) ^1da177e Linus Torvalds 2005-04-16 @167 EX ldc1 $f15, SC_FPREGS+120(a0) ^1da177e Linus Torvalds 2005-04-16 @168 EX ldc1 $f17, SC_FPREGS+136(a0) ^1da177e Linus Torvalds 2005-04-16 @169 EX ldc1 $f19, SC_FPREGS+152(a0) ^1da177e Linus Torvalds 2005-04-16 @170 EX ldc1 $f21, SC_FPREGS+168(a0) ^1da177e Linus Torvalds 2005-04-16 @171 EX ldc1 $f23, SC_FPREGS+184(a0) ^1da177e Linus Torvalds 2005-04-16 @172 EX ldc1 $f25, SC_FPREGS+200(a0) ^1da177e Linus Torvalds 2005-04-16 @173 EX ldc1 $f27, SC_FPREGS+216(a0) ^1da177e Linus Torvalds 2005-04-16 @174 EX ldc1 $f29, SC_FPREGS+232(a0) ^1da177e Linus Torvalds 2005-04-16 @175 EX ldc1 $f31, SC_FPREGS+248(a0) 597ce172 Paul Burton 2013-11-22 176 1: .set pop ^1da177e Linus Torvalds 2005-04-16 177 #endif ^1da177e Linus Torvalds 2005-04-16 178 EX ldc1 $f0, SC_FPREGS+0(a0) :::::: The code at line 48 was first introduced by commit :::::: 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 Linux-2.6.12-rc2 :::::: TO: Linus Torvalds :::::: CC: Linus Torvalds --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation --2fHTh5uZTiUOsy+g Content-Type: application/octet-stream Content-Disposition: attachment; filename=".config.gz" Content-Transfer-Encoding: base64 H4sICDimDVYAAy5jb25maWcAjDxdc6O4su/7K6jZ+3BO1dlN4nxMcm/lQYCwtQbESOA4eaE8 iWfGtYmdEzu7O//+dgtsBLRwHubD6pbUkvpbLX795VePve82L4vd6nHx/PzT+75cL98Wu+WT 9231vPw/L5ReKnOPhyL/HZDj1fr9n5OX1evWO//97OL30cibLt/Wy2cv2Ky/rb6/Q9/VZv3L r78EMo3EuExEpm9//gINv3rJ4vHHar30tsvn5WON9qtnIZYsDiY8ufdWW2+92QHirkFg6jPd nk8+35AQP0guPs/nLtjVuQNmSAmkz+KchrNgUoY80DnLhUzdOH+wh4cB6MPF54tTEh6zNBdf HCDNWmTZQ8ZSpmMtU9jx9lx7wJl7wQksl7nBmrPwnASnPIDOaspFqt2rnamLM8d+p/Os1Lk/ GtGbcQBfkuAsgel1RsIUi0U6JUF6LEqRAf8OAGmGq4HXA8Bzx7DCv895GaiJSPkgBlMJj4+M IYfHOIqg72CWIYRY5HnMdaEGR+FpLjXNODWKL8bOQVJROogwXJPPz29cUlrBL5xwMVUyF9NS +ZeO8wjYTBRJKYOcy7TUMqD5L07KeaxKXzIVDmBkAxi1YivHmZClSEOheEBJccwTCTsWFUZg R9wW5BqG6x5FVN9axsuCqbz0mcbeXVgSnF1cXZ9dNyB1p3lSjnnKlQhKnYk0lsHUnpgp2OkJ 06WI5XhUFo7d7KJdXRBE7ueZ3HExnuQNGXtAACLrKwYLDXnM7hsEDTsYljIReRkplvAykyLN uWowAj7LS3UxtVq0CtothsgwYSULQ1Xm5dWFLywqEJLKNJATroCxG0DKYXKEJgy1EdBnUXav zbo5U/F9mSkgy5pRXI8ub1oKudK2gVMJpMAiMpOKYpD9NgnNkJz+/tWAUhcZDlH6Sk55apFT w1kmrH3KilraSw7MydL24uqx9IdwJsWY57Ef6d6aEVICaI9LLE+oL0hMM7QvZV7yODofNW1m sPgMWAVYotQTEeW3l5WLAX1b7oW9vloERtxB+APO1dmTfZ/+YX9oyPMRcFc55SrlsQPFMGAP BUc/MkoL5QOj4O5nbMwP7ljtuO1+vi5tR8zMRhzNXlIOiNMZqI2CawoZJwL1/8DLs6upb/dq IFcXU5/oGkkVoJablw9gwKQKQcTPzhp+ABULugCPvr3QvQCERZIhl7WhoATKyGasfWPFRC38 SkDzMgRZ8WMe9nRhNoETtBUIsQwcH/nkrkMItun7NHCdEmjFhCcu2epCDTk6Ywp0OGhxniLB Vuc9pGmasBnsLpgShaqK65aWa0Yyvm3Q7+bXxoFqBsUV4sllXXUr4Lzg1Kzuh/00A6Dg4aQi jaQZxMFRUczGoGbnOSggcywHskExlVluiIDt1LcXh82VScYCdNPt8x0r1m7qnWgDQi40GhNn vz3dN88EKNdcln7RUnRTnRDEhzxiRZyXCVqPRKRmqtuL05urpmeuWIr7DwdykFWKr5TUen+A LM+BfTtWKuPK8NQ0sQkLYs5Sw+ykzYmUTHPwCGk/OkhoB+/BL2h/50FDOBE7HKrJQ3lBe88A OTulowAEtX3uBjC6PG3xFLZcDUzgnuF0RDktLRlkClXt5MESgodboMBScYrzJMvRkSA5uQbP ZFykOVP3LfVYAUkCp3zO6R0NFNMTo/ko6nmAUtAzx/J8BCrx6mLAHKNAhTzbY1gSB3w3BY4F Td2DAbPvuwud3346eV59PXnZPL0/L7cn/1Ok6LspDuyo+cnvjyZt8Mm2/3dSWRrGL0Qc5gL6 gNyjdgM/3cxmbNbYpCuekeb318beV05PiU59YmkjkcLJ8XQGZ4jEgSt5ez5qCxbulAAV+umT tbtVW5nTtg42icUzrjRqlE+/fXt/3mzW30dLawQbpWRFLik+Rk1YWfBy/CCyjpKtIT5ARjQo frD9QRsyf3D1kC7ARQNo02RxY0OQg10PZA3B53SKpCFxGEzJ617dTqTOkd1uP/1rvVkv/31g M1R0LRM7E1nQa8B/g9zypzKpxbxMvhS84HRr06XRrBOWhjGtdVkRtp0Hw9QgBN72/ev253a3 fGmY+uDhg4xkSvoWCTZIT+SdxfLQYjyqsMwnirNQpGMi6EJB5zMwPXoQWEkjgZJIXRZZWIVF ZhH56mX5tqXWAX7FFESTA6F2gCVRAYOoJe30FTSCQRMyFAFx0lUvEdpOj2mz+Bp8JtA3ukQl og7eL1jIk3yx/dPbAaHeYv3kbXeL3dZbPD5u3te71fp7h2I0qQw0Kejsag8PJBpXoA3GnSHI 9XWIRxdw0DSA3HKnu7ByRqfbcqan6J3pHt+ooPA0td/pfQkwwsxgM504CwrU8XFcnwhNCQxi MI0hoKK5afUfix2nBwKkJXCxREUf1bHc2YWle8dKFhmdVwRfJpiaLACeby4VRQPKP7hVAbc4 uwBOTq3fKOv270KDC2U3ZCJs/U55Xv1uElkmO4Gq3RBMJ7vudaRBOcHmByAptOekMOtBp6zj KXSeGSvmSDMFQSkz4HMMr0DqTZxF+zMtvcbAU4FhwfG21sjnIHctDq26mX+AM4hxp9Cs75O2 Q1y3lXSXbrbELyxugbgf+E9Zso1ZLcyOWcRHRc7nVp9M2lAtximLI0tnGTVgNxjVZjfoTowl LCuZBaL8Ugg1bS0SAhsehu0Ttc0q7GRUdvWraQRWK2eVr9yJy7Pl27fN28ti/bj0+F/LNegm BloqQO0EmrWR7/bgB5pCDnvZm4SgEMJ407s0yqtSkS3fh2EWaUrxUcxasb2OC5/m/Fg6APc6 h8AvVwX8G4JVvwd+GJN8IiMRt4yXrNr47Utrrw/NNhMae0lrkT8wXwAL4RR7mhGr5AqLgZVQ xgNU0V2/qZqg26p4TgJMWGy05kTKbjhtsnN5rghTDN6sMXa1Lac6ZqI6eWrGZqmdCP2OwfGj FjTxf7l3Zgmkmh8+hCvj0MLvEASqygQRsD85D0B5t7iuC6QC4S6OibcGRwHlOi5iRl9F9LF1 DkExxYzVAiBghpDEHOO0xZgG7HAKHIzQi/y7KRYZ7nM9PBCRnZkBUBGDe4NCjgoTDcgg1Mo8 xZjb8IH+O6bCg2s0DuTst6+L7fLJ+7PSRa9vm2+r58onOmwYotV+uGuPDjk54Mx+Th3VB6Z8 mhbYsgTVuS0wRuWbdEKTfKlX1QppTVOdPYwlo3RxjVOkCO/uUd31ALRHrpnccb1ZddcqOER4 MX13t8cUFFN1Mmt7a+/rlq9pNceC1qmNn5DzsRK525sIkhBUKq8kWfX8yWzxtlthIt3Lf74u bYvDVC5ys9JwxtKgkyIFk502OHTgAxHTMIbU0bExEjFmx3BypsQRnIQFNMYerkOIbg4YXZ89 FHraMx9WpiWFperCH6ZBS1BLQpfz66sj1BYwHkgrPzJvHCZHBsKb6iNTxbk6ek66OHbWU6YS xznt3adI0PuLgfjV9ZHxLS52zlDlpytjtFdzQnr68ccS81K2OyVk5cunUtqpo7o1BLOLs/Uh QfSl7X5VOYh9h4E0haMnEjDQq5739tPjt/82+bPUbAXe4hpNBosW6oudATNwdB5q+BCM7HsH KoW7OtvAdu8IgsUHc1trNt9/33qbV1QuW+9f4FT/x8uCJBDsPx4XGv42f+XBv5tzmdyZuxPA bXnjbdc8lAkT7cgMmxMt6NqRoPaWnFDYDXSb65uVXu6uhatzh/uLQCFnThgEQW4Y0yLsq+ZA eD822533uFnv3jbPwMLe09vqr4qT7QE4Jmf9QhOcBHtsGcGknSAIAlctw0TmWVyYwR1FNxAu C9mjmf+zfHzfLb4+L01tmWeim50leegMJOa2t+NNNgAYPIUzxvg2E/YFoESNiO7tXjwQeQKs zG0/uh5IB0pkrdC2csZkQeV3606J0EF7QpzPvlXK9Pmo0TGtAKqfW+y2191l96Ib2lK7rdkL 01pxw+ZvOH8IFRffly8QKe4lq9naqjZD+OCtmZsvTFpq0borrNzLAhzMNLTBlqY3MMrXqwfG wqU4Rn/SDniaWS1ZxRvG0FL6n06eln+d/HhanH+ycWLOW0lnaEMRNO2OajCIPaYc9Q/trQGC Qnc8Ia9mks5kbuVw9wU26Y4rMF7gjgv03WvWo5JQ/GB10uXu783bn+BL908pg53jLb6sWsDW M8plRF/AxsbfLtx5pFqLw98m0UWuzkDBa4E1xiKgPUiDU92l0tntahC8SNa5COjjwEwaRP2U dqo2bf8rg8gghmGYbm0QtO990FKB/HIqVAQkA4OAhwFfh61hszTrDAgtZTgJKONbQ/HCmuql mKJ64SJFJrLbl/bCRTZGtcWTYu7sVeZFikUdL63JErMeR0olBeUip8KR78B9LdnEDeOOYkpR EYSKyw03Z16R7DhTakGHnglWEFTxcOdG0ok8OFeD5/O2ZBlwrGhrboBdQWry3kGG0f/4wHnE 7AecoPDtaH1vnvZwcN/ev64eP7VHT8LLTpBoHf6MvtoGkvHmFK97sRp3ECeb3Js8KAhnktEJ N0CNRFzV19n9q8a+YuxhWKFh5ZJs3pao/cD278BaOerFm/7wPyze7chMG2guSgap2CNWd3Yv boRYjltTYeY5TU1yh97KqDTX0ZRj1YxeXVlrGNnswdy4P1vw2l6+rtbLJ6++FqfWP89NVXW3 627x9n25a3l5rT4Q8I6Bec3diC6oYhQS3SjG6J7e7QYv1KRapFAn8bHBJkN82sPGvKfJ3X+4 BxzpB2mtN3pwtDT6+Hhp5OS3BgntJkjgsXkB6cMrxmzznDKmJDLmn4/OHmSJPsbjFrLMcp0r Y+pabAuePsTabrZNWA7uJ5ZF5ffZBxZc4fsZVQhNIOItJuYeXautsbLiY8OFQdA15j0UPnPf BFL4H5CsCpMHqYOxarg+RhvE0RNT/vKxCQckuULoOwVDuGDdx26+q7DiUf7B8WKejvPJ4IZU lT5DGAkLjsCNfhhAQN/UlEENryuNuhZrCFvqD7K3vEvBUA9P3ffkB3CnOYrh4JK/FDJngxiN ghvA4SxOjmAEleS6UXSQH2N5jTUsH+T3Q8gyPGmOV5WDKJXyHEYBizaIUECY3/b9NXc4xlk5 6xeFiOx/B7wu250B11Qx42BSNVUwOuCI7ODQtNpr9T2h2yuNZRN6AKmsWrBzxnqb8rg7dO2d dlr3tpX/wYPcASwqX68zTTq2r5JbHVoatwUh6FLsrtsEUSG9bWy/fALQkGRvHFoe1+mjGNAZ uZAOBUFl0fWkLKffZHXVcnMRokRIliubxJqJpkyy8dBhFrO0vD4dndGvHEPYcgebx3FA1xuK jH4IxnIW027m3PGkMGYZ9TIhwxd1LQ0vOOe4iMsLl0qvCoPoNQbUJGGqsZpJYrmoPZUPZ8LM hRt9XZbxdKbvBAgLCZ9VCtCZhDExEJanDyI4Q2JcaZLFuhxrOqKeaErEsZuaYw39fdmu2/G/ xJ2MmbdbbnedK2jsD7aqU2xnZXUTxTqp6ObaiNGdhArpelWf5kcGIj9XGVVZcyewzlm3C2qi MXIM/RA3Fn4PWK1332u9XD5BELjxvi695Rp96ydMpHvgwRgEe3fuRMJokVDRVJDlWLihN708 1U02kAgNmIhoAM/Q96KvRNIo6C0yXP61elx64eEeoynxXj3WzZ7sJk2LqnhpwmN8+JAxcAY/ nWwhvD75sdm9Pr9/t3Ir4JTnSRZR8QwY/TRksbSv9jJVjR0JlZg71075a3RnKg1s9X1AFWnv ORafQ8h1wMAS8+44VeVhtZR+LVeoxMwR/tYIfKYcWT/zbA1cOjUTWtJjHIp5swJHEoFjKPO6 cAIrCLFmMyIKB/By78kcZivgg39SVzVPkoc218FPU27vqLgAKExv3gbiFYIby74bdmMx9bmP YSgvtsBySZWkMeV3+dtivX027pMXL362bo5xKD+ewt5Zhr5qxLvSzvKqK2lHAjLK6Wv91AUQ ToiKQudwWkch7QHoxNkJiZfSUZOLwO4zoqo4mSUnSiYn0fNi+8N7/LF6tS4s7ROLRHvz/uDg DFT17q12YNeSaIb+aCRNHay0a3b3wFTW1f9tRgGIDwJeP4ynzeAeMf4o4pjLhOeKiroQBV+D +Qzs6p0I80l51ia2Ax0NQi+6C+rA6fdWFBF0dpnAbD8D76xcnPV3XoyoXRe073QAuymXDmf0 0DXNwfzOya9l7DklCbXRPJ12sAas31rkIu6KMfC1W0dJN4z5+PSyJybJ4vUV7wZr2TC23QjL 4hG0aUudGqokeF18jkeDeXzKsCEaPm/Ed5kd2uvm+i7aSarZx3KGBZa05TBjxSzv7IUhVi+f v/2GVQoLk/AG1No0UPUKZqAkuLx0fKcElUs8tOPZZAgKf4bARiOPkMKeZ7La/vmbXP8W4En0 3JTWIKEMxvTDDYSmLKWDAcPPKe/CzehxFobK+2YU58vyZfP207V3FaZr/MIXBH+Ye/8EP8ZQ 16qbarj6Sd+hf91Ejp2lVK6uLkOkihfTIo7xB+1m10hYu6I1Hhp+T8X1GR+sYsy+lIHQunT5 7fWAIQturuinn3uUIuE0e+wRAnlHvIjpIMWtyjG71bz9NeXAt9ddeKDus1yavi8E8cqnGeew p8fgs4ROq+8R9HR4AD2nXt/uoSBXjb60GuvVnl1RMHye0nkFvQfPBcVTQQgqFSO+IJxZWrvV XDulGna48TxbCHe9Z9B7UchZKWdY02Eyyj2iJsM7dOyIlG5zcaXwV9tHylkG6wCOOn5yQ5/H s9OR47sy4eXocl6GmaRFMyyS5B4L8WjBnbA0d9go8yEjGdDGORdRYkqgaF800DfnI31xSmtx lidgTrSmHU+eBrHUhcIvCyl3EDLJ8DMz9PhZqG8gGGaxowBCx6Ob01NaSVdAx5eo9meSA9Ll 5TCOPzn7fH0c5fMwilnLzSmt/CZJcHV+SSfDQn12dU2D/CQ7vb4Eb4w+gMx84MJRyVhov6yy TGWk2c2Fa4UuMxuMulakKg3kGfpK2/fX183bzhaDCgI8M6I5sYbHfMwcZUo1RsLmV9ef6Xxf jXJzHsxp7zfwP5+d9hi+eue6/Gex9cR6u3t7fzGvtLY/Fm/g6ewwUsTleM/40bsnkPPVK/7X JeXdEzF4DNP2Cy/Kxsz7tnp7+RvG9p42f6+fN4t9+YA9IMNsMkP/NYt7g4n1bvnsJSLwJlg7 Wnkw+zxLAwwWb08N0M4P3H1x5nhFaNdEh4d3wNnzcrHFb/6Bx7R5NFtkoueT1dMS//y++2dn vNwfy+fXk9X628aD0BoGqHwcuzA75OUcNLup52nNhbco6P22G0Gbm28c9fQwAjVrf+zO6jcO 2+OMQxyqVTt0aM0oj8qaJwj7joBpxndTvsRHOUrJ9pM7Cw8mIN/V4pKZnqKCtt9xYjs+rC2j w1se3EiMH6D3XrxOvr5//7b6p7u1dfqHogR9+0gqqpjEItbkhaLocPCBsGffWtLd79sq5K5+ owPoF7qsvgBEUCWjqPfBtQ7KwJowP3A1Oju+pIq0/2fsyprbxpX1X9HjTNWZO6I2U+fWPEAg JCHmFgKSKL+wHNs5cY0T5zpOnZl/f7sBkiJINDUPWYRuYl8aje6vB98zwVdjUqnhiWWwLP0H TcuTRDeLK/nwJFotxll0IbdwERzPRi2XxMnWZZmPs+xzPV/5t8mG5QPsIgXhrdGKkzyYEUAs 7bSTcrxBUofBDXHIXVhmwfgIGJbxglIV3iwC/+HR1jbisynMCHR7/GeMqTiNd9HxRBgxtxxS Jj2YoCFPzNdTcWXEdJGA2DOyGI6ShTNelqVvLWgervh0Ony2yN6/PL1Ru4B93Hl9f/o3nGNw HL1+ngA7nBX3Lz9eJ29P//fzGc66H9+fHp7vXxpPxE+vkP/3+7f7r0/vvQtwU5uF0ZOPdxyu zGurLtJ8Nrvxq5/axaBXy9V03A/vY7RaXinqkEAP3vj0ae5m1OytiivZqFEG2yoS8YzsjlTB ZGSdij1l4AcdBwX83JZ1EVMwTe/8dwxDrF8Iidz7p5Kpf11xA0A3+QXkoz//NXm///70rwmP fgN57NfhSaGcRvF9YVP99WrImfLC9rR5FsMjWhVwPqdR1gWXbArbeatAPLvasUDjoCo++HQG hgH+j89PWg36PM52u559rsugOD4KI6DcUPOGnawbKdS9XJpPczmcEi7Lll/jkObvK0yKqX/C EssN/DPCU+TXsomzUyyOFHSumdkjA5WpyKBrSKYJTSejIJL9W35jXUvdlLcH1fNXtEKbEGIS zNeLyS9b2ANP8OdX3+VoKwuBb8z+vGsiPnj4b0Zy5sOhgpVcv/51HZE6G0Rat8g5CbI0ouap 0UH4710fD7AR33mtf7CUrSO5Gd8BwXxSaMI4GpQ4+m1I0sTzzLGMicd/KAMXY0bgNQEZzRQo mrFhMMAABfyHeKrV3n3g2FM5pTGFusOKvmmMnRL4DH+5cz66j+jRM9xPnz/9RGB39d/n94cv E/YGZ/L708P7zzevLr422qmSYxiKVUlhdztcU0K/OsirRirM/ehDLnsw9+uRelyzebUKqtXS 07nQt/gUr905bHf4as4zxzFKxH5xcc6XhAR4zApNiN76nO8zr7K4UwMWsVwLZ67XSXiPL7bS D2zUySBGAGvXB1+k0guY1fkqcd32kygMggA7y9uUGL05CI0R5EqAQqfSOyLdahTcOy4MBy1z jkSmYwJ6WseUrjEOCOg1oBDGbzHljcVZJKATnCoVqJxaB3aO+c8G5jX06jR1U2Qs6k3DzcKv 8NqkJQFm3hvwjrJ2l6XEFQgyoxp7qRs226la6j8EbRfFpYhYVe6g2eM5872IlcFW6ohTJqnS /tFsyf7WtGR/z13IR8Ksuq2ZLAoX1pWrcP2X737kfKW405r+EryciMmaAiGNUspKuSkmEsNT 8RB7n0u6Xxlfqq5JUTwjAiMc0qi/1If5CRBqhXsZFLOrdRclc1Q5akYY5x1LrzVpJ6u9Y8Kx z3u4scMPzCu2MzwU1KwgIWINhXj02PlvgZB+9NvHyZL6BAhEIYvplW5BtHn3ki5zsjkfvE7Q ndwSVoAw7fRackwoi0p1S6gi1O3Zd7ftFgSlsDRzKp7E5aIiLDsNjRSrgbocUD2FSl64U+JW heEygO/9It6tugvDRdlHPvDkfC4cpSH+DqZE72wFi9Mru3DKtBKJk2ed5N+JVTgPZ1cWRDhf O7DJrAzDmzXlXDqjJhGQbkksCISQ8R8Wpyic/jW/0uqjjKSjiLBQpj0RZfhhdut0FfB7ke+M yG497EW6ky562J6ZGA3eyp9humanrbwi2H2E67urff4YszklSn+MySP8Y0zMHSisFGl1VdZD NxstnAMghAum1+UMCTrL+ryQVOXEym/ocLcRlT5JpQlZqGEMg5k/ZhMyGOC4okQzeMIHoAiD lf97te8LsJ7OiJwxKVbTxZWlooT46BVSlYyZi1jE17Pp3Pes4HzlanqkWhOLC0jBmiBtr4y5 SpTTTpXwdbD2y0aG5p+WIpecOimxiHVAfGiIi2u7kNLmscCpqE4Qk+vqOIKk4i7YPD8nMNEp sWZHGPdw9H1OiZ1UEi6hTSW02B+0s9vYlCtfuV/01BEe/kzt5cbZCjWfL8PgyuXq6G6f8LOi g08h9YjQKT3MuGG2J3mXunAKNqU6Lamp0jLMCYZtFPmHYC9z7zNrvj/HctM4GidSTiBlxLiQ 6XA6L/Ez/7Uvifq09gJnpCCkXmyOInaUHI2Kuokf8UR2k+JSuwlcwn2K1WmdvtdCKUHWDhcT SWzujzQDT8Kbkm675Hl8UCS5Pj1IukX3YTFdew2Sc+lXxsGdDJZ6MA0CuoFWUqPJIJFWG6k3 zI8dm+eX7ocfCNtnIiI4iRGGF9HCTWwhMDppSZ73uIyCv75gXZKzHpfR0rtJmFJp3ZkdKpZ5 99eeuzRjq1vgVOkCFiNBwTTVvTSDfIL/WzUvLwe1aR2q2OP99/4jGhr4cKb9YggSb9mJ0hAh ORc7pg5+DT3SCx3DpuXfAS50v4YD6fCHcgw0VY947aZHssh87z9ZTr2jnEnCOcMYsPk1YYVU CeEMiGXfRcGMsIrDWAWEuvoUV+55Ym2mjPfX5PSMTl6/DGGlfkUvMTS7ef/ScHk2xROhCD8m JSr1/LuFijxvFt++/3wn3yRlmh+6aE74s9puMY5N30HO0lCTHgm/r6PlsLGKbimXRcuUMISw 7DO1rj0viPv/jHjan+8fHIMY+3V2gHVmbJi96VWu2KEkqQo2LRDOyz8wrMw4z/mPm1XYr/yH 7DzeBeJ4jd5z2uuM1MCK3fnyVpyNbY1zOa7TKhbly2XofxjvMa096+zCom83/hI+wnlAWEZ2 eGYB8dzQ8sS3t4RNbsuiOVstCKeXLlO4CK60OE7C+dy/YloeWIU386X/6nJhIrDSLgx5Ecz8 20jLk4qTpgBZGx50GkY1yZXilM5O7EREJbhwHdKrnV3qHstwUXQeHfEnLLGZJ6lica586Xjj hn/z3EeE45blCEXnI/KzOVd9JIMCZQJNOEqdli4wXq8gTAA6xQtUQRJX/E5p2YHvb73gLJZJ iUKyeFgVuP/Ewnw9UgKIgsv1DeFzZTj4meXEK7ehw2BRniCWAcdgQ7jZ2FbyIJjmjPCEMSxH VZYlG6tGO5ikJXOfD2UferOE3RYxP/xKcctiQBwoVDrDgJ1vt/SxQ0mqobXG/v7t0Rj3yt+z SWOw0chyGADnMjE9Hjs9DvOzkuF0Mesnwt993x5LyDkuHM+ks2S4atml2PusYH4jNkutzZF7 GfdLVrPkQMTarrMpOJnHjiXCa1TOv9y/3T8g6snFvaK5O+tOYNmjg9ZqHv8tBGHMei6kR90w +NJatNJGojt5uS/JiOXqxmNCAM91WOX63Avlccy1qkGGYlyBaC7Evdhz1hK+yWKQWPvjzJYr t4/h8pZaK6SIjHKc3WWUvrnaKf+Cr2PE+U3DoF23NtRK7Sr4hpZ+A7fgun6hDfM3TOyE1Bm6 /Xb5BsPRJTomyF1CWpiIyuqPmY9ag8m2LP1eNUxNyEpyirctOQ2mcfr67TekQYrpHmPe4TEG qrNJtlG1Vz6lVc3gBtTpJHa6p5/pB2J0a7LiPCVu9zUHdNFGFBEj7Gpqrnq3+KDZDrvzH7Be Y0NnlqtZFYQLvCUXRHi7mrxVcRXnZBmw09QxjvwHQp7IygaI8xlBwV5hAa8dPWeTaEMZyazn tFizFdrR/kaa8Lcs5uuVXxxAeQJ1XP7P2GkMkEJz+JP7Y6Ee3XiRcHx34I9m3Mb4dQODYHIf Mduk7YEVLmhdTB5I9gPqIqWGCUEQ6dZFAsSH9vRF6IqeiXLOJyrB9H8AuI5FGKv/ud9UqKWv iKt1Qye8Bgw9iW6I8KY1Ge14SDpIBSNEypAViWiP758pSE3N2xwBzQR0JdVyuaa7BegrwvWg Jq9X/ocGJB+l153HUvIia9TEONg2QN7kE6KU1G72v6AF+svfk6evn54eH58eJ7/XXL/B7ou2 67/2RzkSGFrMQL343GNIXuKhFNnEbjYlpEugZvRNzQwOZ9crkpdstAZKJpoIMYvkEpWcQxdW 8RcIWd/gaAKe3+1SubeqRWqJRDJD/K8DIbibqlqHc5A7Qc4luYpsk+nt4e6uyhQBQ4RsmmWq Eke6Y0yMxN79oOvB0DasM2n6jRKxuKXshpsRksp/pTGdT4WPsFMIAX5ol9uWhcU7AtO6ZdkQ +lmVEw8waqh9zHPlE0LyfIihg2n/MXF631/fhrurzicPL68Pf3qz03kVLMPQxiClVKD2IcjE 8EwpgOuOLvT+8dFENYIJawr+8T/9OAkmvNdBaThidzlcP/bOS5d/97TBADAYcuxXlFgGdiT8 mU9klM29KBLiUfOE4IiRF5ZYoTL+EsXBCtiv354ffkzU88szHGOTzf3Dn99f7nseqcpnrLjh 6AnXy27z9nr/+PD61frofH5+mLBkwxyXnF7gcPtS9/Pl/fnzz28PBkRpBAxkG42Y+CCxwFVN 3P23qEcL0NiC1A/sNTfhVbj/rI3hXi2J4xBp1FGJRX9g6R1GxaVMpZDnViQ54SqG5KPM0UWU uo0hSyG034AaiTnfLqcrQiFpvo74nHJ8M3StBqZODoOSi5tVOT5GKllSMACbcjkdOlW7X58V p6J2AVkjgM98viwrrTgjkKyQMc7n6wURTjdXq2C6JMy3gbic3tB9ZBhmwQ3JcIqD2c18vJVx Ml+OjJNORibRsQyXfpkKqayQd1nKyBVg4yFSh1YiIsl80eEtLt/b/fcvuJ0MHnuOOwYlbzpa D5uA2m/YUA8K4UAuFxNCXoGPEIjXZ8N3lJHIquygUZsGaehu0YHgc2KStoB80Bj/StpuqoiY O0AyIHNHobwdcWHj8Gcr47gQvHNFqQk8y89QBTYgGO/NTSwddVxNK4wHbClihViCiDdGVRGx /Zqyx3iaaozxtDWimEC+FCDMViKFyeFfmk2VKIw4pMPoUtCQW5wouHd69Vs4JIzfGrHQ6U/z 1m2vd6rXnVrGpk2656Jk5vEWfUlBrvv8GQS9L8090HMe4bgYw3Cq1nniv/3gh+eNKEgTSmCA YyiG/iS7XSZKk8Txdxzs7iAKSLtDoFtDS4oKt3ySJm8WZJvw8TXzXcQxTxb1XFbaxP5uNaB3 x9/zOQ1Viv2sz8HM/5BnqWQX+jdopLAj5YONVEmOSioyWG2S3HpuzxQ65KaaR1tyNI9ZFmWZ /9RFsg5XM7I1uoDNlZ6HVMQOM/3JTDkrEsrqDPsoUfxAt+cQ+aVfIO2yONpK5RfEsK2y0AdC eMYZKjDEb0YgYyHDJiRRHnAnQsMrtRfEoxD21yGrbgMKwcfMD0Tw81JFeU5BwjWnnU8mb5ZB FfOoOZ06On9INGFdajDXro4MaWOgHm3OTgZ/D+k+gI2WyKI8DCnENZeLeOzvNDGZr+ZTAuDN 5fK/rneYchCZCH/8C9NxOZvexATaecu2iUB4dKS/OtbRtx+vLwb0By5YDVyf74aLohEf8ThN Ii+9kZ0MvBfvP2tsC5YIC4PmU+p7yDDEGPQaVdUJK4hN0PNZkWlGBmaNs51v3qrskHaN1/An Oun3XyacdMRihskokw5D2oGAgx9WHe4m5TxxEwp2SuCscxOV+HhAx75ikGx72E2GKqH3k1OR KgFJrUDSoHwyscIomtJ5q+rWxXzXfYoB4r6gIyCZ1mk+zhCdU5ZIjjiEmR8LIm23EmOGbyGU OsQGtwgRHbaDCl6o5JOHqQYRPcxkkTDl2Fx2hg17p7uPmeHI4zm+TiONLBCYFleZ1IadxCgH jHswvQ36PN15kB8W08C8ObmDzvj6BmYyeu856fYNZdCRtNO8ySzuxQZ2BwGuPJIwpjZ11Dnz m43ZCWjetQ7BioS4a9tJVxBbW6vE2NG3dSGXdGNCmA8j6lpgqUG48Etvhnyng9XUfx2u6bM5 YeuFdJ7IcE5Ihy2deKMwdLWYEc7qLZkuXSBkH104kENCEjHDxlfU9QLJu4OyMd6It07Lggj1 gpCGahYqpACSP7C7u5HuxZWqGPGamtq3+/WsvDbKDduV3jZsc7qyCWXea7cCuny1GWmj2UNo quKMiG6G5BMslS0IpD4dgz045HC9BGFIuEKZjUJR/hY1eTE2a+COvlwQYMyGrqWkHv5bsrmZ E/YDyHQIw2CkCkCm4Dhr8siKZCd6usFuMB9b7RsdEpo/s5jZNJiObiWU6tRMzvJMBS1pdopw dCNZjWwFIyBuLXnJDqQbL/LockvXPmJFzEYGBaSaMXLMzqOf2+wJR7Ume5pss6fpSUbgF9hd gaYJvs/mBBYTnmZpJIm3twt5pM8tQ/Thag70yDdZ0By1BHONPpJBqoI5hVrb0kcKUMF6PnrK rVc0eZtQ1gtGPIbLknHzH+Egghs3RHqfghtwcBPQ24mhj0w7U7GwpHuuYaCrcJsVu2A2Uoc4 i+npG5erxWpBxYfBuc+E0kXm1+LUlxzSlgrIaTIj7FLs4VXuR24uEo7riD4ai0QQCDM1lXBc b6mET5E5lbNU8qPcjHSNRyvmCNwsnJVl/2ZSJ185/4yKKiPCZhmGcjajK39Otn44Ajtgee96 eVCbvgiBjknjp4FxvGLByMqzbmOS0Vcn5Fj1oYwGHHu5ZQTKkB0pQnw1ugJUXnhh3fEysjm0 UZj3Mho+Wu27YeHhB4bx63TUYS99jguQ2tGB2Uf2GrASP/C8IuAXbEF6CxgyLw7+DdhQc0pf aKiHgvKARvJGxLeSCJYGZL4XBaH9sWQJv2h6XmSRvBVnwsQBc7BOFiQdun2XpYVUdAtFoqqt 39THkGNBmSwa8h3Uj6QCjfafMAxnumIHbuAeSPqJxZq4tZtpdC5oVRoyoN8wXbo+yXRPPMjZ pqVKpjvKJwhZYm5u7DRdpNkxq3RO+fkYJuiD0dltnjyMawbNgogAKtv6jxrDAZckUYyMpLGV Hx9LRG3zq6jMXGYpWt7EGWF/YXiEZvE5pddqDusl5iMZFGSIPiQrJseqqFiCqAY0PRci6qOy uhxaiBgVPlSUBWn8utA5nJ636O3CFCE3mxzQM/lDdh7NRssjETkSiVmuBGE+b+j74qC0VRyS TKVME7qIO1FkoxW8O0eMRLU2zTRY/lUvdELrde2eOpeDxZx61NmSm1PJyWODCMj52+v768Or x1nC+GhvOmcZJjSedRd7Z39ljIW0tzKYS7bnssJn9FjUz/9uKYMnKCMVmGg5blptZaeqPXcr 6py4wEjpiU0maQqnPsfosqfqgljaBlV5ekHTttefP0zPvQ7CRprstwz2iQpNBqTSg9KvKctN p+hdddpLdOwb5oDETWxei5TuzwyH0x9RCCkn04sbtu2Klw5h2E2XCYMm6/xisj5w9zV5rG7K 6dQMRq+IEkd8z6kJIWqyO7omtUCzGWhwpbWHqjWOmgmN66H21FzdksZNnE2Xl4dZMN3n/Wo7 TFLlQbAqR5qGHDcrb6cgab6ajRawhb/2M9upNBNMD6jrSC0ybwdnbWcMOyob66gO36HJudc4 FYdBMFKjImSr1RLkac+3WCwG7TQXHu90rJ3O+cv9jx/+rYvxxG2seUnqPgeZqR91nvUwQSe8 ke7TTIt/T0xbdFagZcbj0/enb48/MK6IwcT+9PN9ckEUn3y9/7sxRjbI85+eTJTdp8f/naDJ cDen/dPLdxOs5Ovr29MEg5W4ta/5+oNSJ49YpnS5arSVq3wR02zLRuL01HxbOKApkbjLJ1VE RWTossH/iViBXS4VRcXUr5fusxH2i122D4ckV3sixlWXkcVwk/V5gnSZEB4EJUNqmG5ZkVzL o77IICA4HxxbDRNcDKvDZjVz39Ha1SC/3v/HxHocRv8yR0LEw5HxMELy2DxJzJqMCO82c8Cd CNPnmkjDsMBNEEQTMTTuxnb1AKjdrjGvi97P3EOb+F4kckVXC6gzvx7I7C3RQXsdw2zFjkrs +ltaIbPlyBjEYpdp8s5kOEb2/5iQaE0H1/OLn2844Stm2Yx7AH3QRfRNyxxBOpIGvoDuNFQ3 RHDmxQQAhOk8qeCf485/BzBtpZuKvtYc5LdNQVoim6ZkJ1bAeNAcePbQU2OvDH68wnDepT54 wUHt8Y6WPdtTfyqc4RP/Vc1kf2e6k8BmNitRgSgJ/5kv3dBz7fzPv/z94/nh/sXGlaYWAIWB 1YibW8JVN81yK9JxIYnHf3ud/P/Gjm25jVv3K5o+nTNz2say4joPeaD2IjHai7wXyfHLjqOo tqd15JHkafP3ByCXuyQXWPsljgDwTmIBEASQasoG8uppLsd6omQkxl6ozlUgitGhLES44II4 belvXpoyDwCilA/sgMoD7G9a7RMB6BSlnMtEMo6hEv7N5JzL6lpUgXahI7FhKsbyrIv6ljh3 ZhJkbklAMm8C6SoIGFchLFQKLC79I9KEMDtv0QjmjU2tw0kEOeMbW+uoEsZAytJgEFMWmcZX zKUKGs6N+8zgQG2ejqDwUYcIi+mOsbVis96ji1at3B0Pp8Of58ny58v++Otm8vC6BwWLeo1f CT9xixvmo3x5+qGevVEvn4RM5qTntARturYUbZ1aff98OO9fjocdVVlZRfoGoinQZ2vQo+Ll +fRAFVynKCGD9EjvjOgWU2VwJy5nzMiSC/idRuy7xPWWebiJsXvZUip67FvJOOJ0OCHIlsrX b/r9r5cAEfcxy7fw0WHrs5uCeDR03O0pUWYIiKBksUnxSGSX7l6ywPRSAc3ip7/37atlS6mC ZZo2rqNeC2puMZkOsck6vLSimQDwcljPpbGhlE2V61R9jFDTlh9rdIb1P3sAfHUob4EVJ05f FKqMgrqQKpaL3c6MtRv5g/rixh+Dn2xRwE1tBou/x9pJ5yrLcD+eIpLALAGjBmlt0xYMxMw3 qiNRWbQwMMI4GTXLfb8VAYm65VGLuJxyuHlV8AUzmQyL9rNELi7yNnsnxDLBoFLByomVE5eg 6cvYCuQT+gCpASBQuBkkY6ERZI9v6pxJ8qQwQZUQQ8F4EnE50wfEtILRp9wTE3iyuD7e97tH V/uLy0GGao1WedF+DzehOuyDsy7L/NPV1QfnGH3JE2lnvrkDIruXdRg79Pg7SzpLapiXv8ei +j2r6CYB5xRPSyjhQDY+Cf42lld0iF2jxeTT5RWFlzlG+ABG/vmX1/Of178YmqwaHCQF4g6k QhZbM6r1af/6/TD5kxpRn6rOBqxc53QFw9epdvpVBcTRoDVXVnb2OCC1q6zStbsxFKA/DeT2 0zT8yV7WIDEnc+YgtljVP5JA/xmcZLOusgzUQYSRVCBQO4FSQ/78i5jHRSrlPYdd8gUBpeIV cwwp4ovOR7rDo77EI/wvyRcMJihEyqDKm1qUSwa5GeHEKegbt28hVUTmTUQ80mwJ83RwfpZr vtGb7HY2ir3isUXbFi0IoamM8ff4Wm64YjVfYzzltrCJDeHuYoOMXa6FvzdT7/el/9v9cinY zOFJKKRsmQi1mrxhkpvFGK8wMpHbwowcUUu0wuxmCRI5nQmd7oYwnkF/QxyUD6CoZvaBV6CW QWdfosB3W+gORrCy+qB+6pqs/kNbnT7jzK5/cVjWWbG2H0+o383Cfl0DAJAJEdasivlHxyFL k/Mm+CBaL+mNA6q11Qb+QvWusia7h0094DYSK1Bg8LbTsTcrZL0OREKJEwqrOL1XnfpCDOrx vhg2So3Xq0TBpoNaQrJHLk2Zzpk8b8GaO5HwjRf854E9yJ/8Ck1Lib3Lk9LICkZC6LuUlJ18 0cwu6RgNDtEf7yL6g76vcIiumaczHhEzly7Ru5p7R8e5p5geEcOPXKL3dJwxW3tEtG3HI3rP FDAZrj0iKiC1QwKCqMPqHNx7VvUTlwnRIZrRd2Nub5kwvUgEUvz19cdPDe0q7VRzMX1Pt4GK X3lRBpLMaGL15MKfNoPgp8NQ8BvFULw9EfwWMRT8/jAU/CEyFPyqddPw9mAu3h4Nk2kUSVa5 vG5oDaBDM2lVAY2JdUAi49LfthRBlFSSNtj2JFkV1cwTqo6oyEEQfauxr4VMuLDYhmgh2MjZ HUkRMbehhkIGeNXFRLc1NFnNBD9xpu+tQVV1sfLiElgUdRVfG110pRPbP97vMHuDFaNYRc6V xU2ciEXp23xfjk8/zn+pmGffn/enB8vBqReu1SNc9Sya6IdRsdOoLJEBgBqjUmd/nlnaEnrx tNWEEXcDaPykaDek4PD8Anr2r+en5/1k97jf/XVS3d5p+JHquY5T51u6jJ6WYRjuZiuKzIr8 69gANUVal9XQrGb0BHzNrir5PP0ws3IvlFUhMVlLChpIypmWRahaEMxlW51hegesYJ4nlBCj B2ibBJZQZ1S0ZkA3+DOSllrKRj08xaBv9ELoWjEOZyt44lN9Jsmy8sNFLaug3jLrqrRi0XnV 7Z8Px5+TcP/t9eFB71Wv6XyO2gBz26XHkQgqvpwKude2qXKCCGIODGas+gqvBOqSM3JoKiYQ pEbqywuVB368o6qtfBMVcZJviRWz0WNdXnp3b9ruhpM8SQ67v15f9HlZ3v94cA4J6lP1uo3c wFyLt2EdlnhnW4mSnro1sLOggc2VexGbKHyzEUkdff7gIpHH5HXVg5VvX6d99IcLwUpRok1c GLygGeDVqHEu+r03+c+pvUA7/W/y/Hre/7uH/+zPu99+++2/w41ZAJ+rq+iWuWo1aOUfwFwV tau1lpkfi9LfQCMNaYrttm2uhK2xFkw6JU2LjTWgkzEvX9YFbDFjHGfMU1ABTulII6LKkYGr APZv9AWawaAQwJCSGGdrbJwrzQ/GZqLAxwIYkn6sWcn4dbRLQo9bI5WhX3o3xB5NUET4uEuK ZLjriqCmGZ5OP9QAvlGZQZhdg3g4nOhvwvunKKKCe/jUBm1V6xjdom18wwgo7VibqChUwmPC NNPbyd403yhWF9eZ/vCo/lnmCBe7KMR6+QaNFmhStdpqLjxCI0bEitCvxSkN3/y8CD0SNMfD QdHtqDUpPYqgLahrsczxqm4VY7YHFrjTdbgbEqgO5VaZ99yakGTgCt8Nql8Ad2bJRYIvQ5nH 8RiJZrQjBK0wZMQ9TcnYTttsDXoiGRatyjdlJgYemUZoRH+uJXImdXGX5W5eXQNH//1K5WzQ BRiO2ZHDyo4S6k//yEQYl19MAc8eNmhuHjUgB2cMZ7N3wDyC7qRcSDSbEjoHPGA9YAGax7z+ UMJxtT+dPS6TrMKKSayBnmzqWUHJZePBMFXtigKzHmE/8wpUJx6vuNsGsziMkoGwCbImj9cf matZ9+ngx4UyeLYw0Rx5uhUQVqSjzLyWCcgfeVAWbhqEVKjPF28HNh7sNfPKUuHxRlnF06S3 osCYbpQopdiQev6yWoSO3zD+ppQdUSQmg4Sj4lhwlTqENr2m+P4rQj2ONuqa7CX8dOivzx1q gvRYW4GI3trlfvd6fDr/HL6/wWeiDlvQb3Dg3CEKl5+5wGvLMrxOXSlGIU+CiHZQ+mKXIzTO JegiVyp3ItiUjDBjaEeRpDXbsOW+NRFYHg0e9vMv3Q24GmiXwyI4/nw5H0CnPu4nh+Pkcf/3 y/7YT7YmxtjwTjwvBzwdwkElte49euCQFHhrgIk1iwF9hxkWau9EhsAhaZEtBjUDbEi4xiwh Q3AqMlAJCw7uXoZoFB5xYsHcgk0oS/V5VaLwoPpFfDG9xlhxft+zOhkC8Xbypo7qiOiN+kM9 yjHLUlfLSKWX9UuS51K8nh/38NXZ3Z/33yfRjx3uHwzH/s/T+XEiTqfD7kmhwvvz/WAfBXZU PTNUAlZGN3Jj3uXMlbfj8+G7nYjLVDgPBoWDariZgqocwKJgTow6Kbb8ZK2p9m6rPkDA/emR 62kqhkWXqQiINbuFZmi2rPEbKDZU/J8eQAwYtlsEl1NqeRVirBUgqC4+hG52DG/t1En0R5WG MwL2kegDfNaXIkrwL99IkYZwGIanGMBXHyjw9OMVBb6cDqnLpbiggLoKv7uA+MgEUTFnZlFc fBql2K69KjQbfnp5dJ60dUyzJPaHyOq5JC+cW3wRzIjugya4ZWPemkUXaZQkzJvsjqas6GsG i+CK714YlUTvYvV3rNrVUtyJEVZWgh4uqEWOopBazahYcwGLOxY4OhHVNvfns7NcH/enE/DF wYr22cL92u68AIYeX7rLKW51R18J9egl4bh9/+P74XmSvT5/2x8nC51hheqryErZBGv9DaU+ c0oiRh4w1omOsGw/6GPES9riKcqvKcZclkruaqqvTDC8ucxE0Yq38WDgydO34/3x5+R4eAV9 yWbScwkqCr4HsMwHxms7i0Bsr6TjPZD3Pt2BBMVQhT1NbYXexZMoO/EmMFv4Okr70TOALjwu FDQjHBkqrECLsrc/cHiXfQCA1KJcgkQG0fzrNVFUY7g9p0hEsRVMygFNMSft44D7w4k0Lef6 08XVRF9g6wR346PEg4Z3RO05tKH96TTduMtV/jg3wy9Cw8iCd+3f3iGC7JpGNfPgC9GnKgIx IkIFz7IJdbBmla77PlnweUqC49KCi7LMA6n9+kRRCMvPGUMpqDSAPsi1QSEM9F9Lvbix/bwS 19+oC9LQ6e04bBkrHyTsheMCCoeOdywtQknPZRhSInYuMbXNArTBwgq9HOegGvZ2td5olXum Gpv++t9rywanIReOg0cbIV7eDYLv/B8BX/9THfMAAA== --2fHTh5uZTiUOsy+g-- -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. 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