From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qe0-f42.google.com (mail-qe0-f42.google.com [209.85.128.42]) by kanga.kvack.org (Postfix) with ESMTP id 95FBD6B00E2 for ; Mon, 25 Nov 2013 13:25:13 -0500 (EST) Received: by mail-qe0-f42.google.com with SMTP id b4so3443710qen.1 for ; Mon, 25 Nov 2013 10:25:13 -0800 (PST) Received: from merlin.infradead.org (merlin.infradead.org. [2001:4978:20e::2]) by mx.google.com with ESMTPS id cq5si11960095qcb.82.2013.11.25.10.25.12 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 Nov 2013 10:25:12 -0800 (PST) Date: Mon, 25 Nov 2013 19:24:50 +0100 From: Peter Zijlstra Subject: Re: [PATCH v6 4/5] MCS Lock: Barrier corrections Message-ID: <20131125182450.GF10022@twins.programming.kicks-ass.net> References: <20131121125616.GI3694@twins.programming.kicks-ass.net> <20131121132041.GS4138@linux.vnet.ibm.com> <20131121172558.GA27927@linux.vnet.ibm.com> <20131121215249.GZ16796@laptop.programming.kicks-ass.net> <20131121221859.GH4138@linux.vnet.ibm.com> <20131122155835.GR3866@twins.programming.kicks-ass.net> <20131122182632.GW4138@linux.vnet.ibm.com> <20131122185107.GJ4971@laptop.programming.kicks-ass.net> <20131125173540.GK3694@twins.programming.kicks-ass.net> <20131125180250.GR4138@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20131125180250.GR4138@linux.vnet.ibm.com> Sender: owner-linux-mm@kvack.org List-ID: To: "Paul E. McKenney" Cc: Will Deacon , Tim Chen , Ingo Molnar , Andrew Morton , Thomas Gleixner , "linux-kernel@vger.kernel.org" , linux-mm , "linux-arch@vger.kernel.org" , Linus Torvalds , Waiman Long , Andrea Arcangeli , Alex Shi , Andi Kleen , Michel Lespinasse , Davidlohr Bueso , Matthew R Wilcox , Dave Hansen , Rik van Riel , Peter Hurley , Raghavendra K T , George Spelvin , "H. Peter Anvin" , Arnd Bergmann , Aswin Chandramouleeswaran , Scott J Norton , "Figo.zhang" On Mon, Nov 25, 2013 at 10:02:50AM -0800, Paul E. McKenney wrote: > I still do not believe that it does. Again, strangely enough. > > We need to ask someone in Intel that understands this all the way down > to the silicon. The guy I used to rely on for this no longer works > at Intel. > > Do you know someone who fits this description, or should I start sending > cold-call emails to various Intel contacts? There's a whole bunch of Intel folks on the Cc. list; could one of you find a suitable HW engineer and put him onto this thread? -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org