From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qe0-f49.google.com (mail-qe0-f49.google.com [209.85.128.49]) by kanga.kvack.org (Postfix) with ESMTP id C3B3B6B0035 for ; Sat, 23 Nov 2013 16:30:10 -0500 (EST) Received: by mail-qe0-f49.google.com with SMTP id w7so2286613qeb.36 for ; Sat, 23 Nov 2013 13:30:10 -0800 (PST) Received: from merlin.infradead.org (merlin.infradead.org. [2001:4978:20e::2]) by mx.google.com with ESMTPS id o8si3248480qab.23.2013.11.23.13.30.06 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 23 Nov 2013 13:30:06 -0800 (PST) Date: Sat, 23 Nov 2013 22:29:29 +0100 From: Peter Zijlstra Subject: Re: [PATCH v6 4/5] MCS Lock: Barrier corrections Message-ID: <20131123212929.GP4971@laptop.programming.kicks-ass.net> References: <20131122200620.GA4138@linux.vnet.ibm.com> <20131122203738.GC4138@linux.vnet.ibm.com> <20131122215208.GD4138@linux.vnet.ibm.com> <20131123002542.GF4138@linux.vnet.ibm.com> <20131123013654.GG4138@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Sender: owner-linux-mm@kvack.org List-ID: To: Linus Torvalds Cc: Paul McKenney , Ingo Molnar , Tim Chen , Will Deacon , Ingo Molnar , Andrew Morton , Thomas Gleixner , "linux-kernel@vger.kernel.org" , linux-mm , "linux-arch@vger.kernel.org" , Waiman Long , Andrea Arcangeli , Alex Shi , Andi Kleen , Michel Lespinasse , Davidlohr Bueso , Matthew R Wilcox , Dave Hansen , Rik van Riel , Peter Hurley , Raghavendra K T , George Spelvin , "H. Peter Anvin" , Arnd Bergmann , Aswin Chandramouleeswaran , Scott J Norton , "Figo.zhang" On Sat, Nov 23, 2013 at 12:21:13PM -0800, Linus Torvalds wrote: > *SOME* assumption of mine must be wrong. But I don't see which one. I haven't read your email in full detail yet, but one thing I did miss was cache-snoops. One of the reasons for failing transitive / multi-copy atomicity is that CPUs might have different views of the memory state depending on from which caches they can get snoops. Eg. if CPU0 and CPU1 share a cache level but CPU2 does not, CPU1 might observe a write before CPU2 can. -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org