From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qc0-f182.google.com (mail-qc0-f182.google.com [209.85.216.182]) by kanga.kvack.org (Postfix) with ESMTP id 3AB626B0035 for ; Fri, 22 Nov 2013 13:51:33 -0500 (EST) Received: by mail-qc0-f182.google.com with SMTP id n7so1394949qcx.27 for ; Fri, 22 Nov 2013 10:51:33 -0800 (PST) Received: from merlin.infradead.org (merlin.infradead.org. [2001:4978:20e::2]) by mx.google.com with ESMTPS id 7si24017275qeh.34.2013.11.22.10.51.32 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 22 Nov 2013 10:51:32 -0800 (PST) Date: Fri, 22 Nov 2013 19:51:07 +0100 From: Peter Zijlstra Subject: Re: [PATCH v6 4/5] MCS Lock: Barrier corrections Message-ID: <20131122185107.GJ4971@laptop.programming.kicks-ass.net> References: <20131120154643.GG19352@mudshark.cambridge.arm.com> <20131120171400.GI4138@linux.vnet.ibm.com> <20131121110308.GC10022@twins.programming.kicks-ass.net> <20131121125616.GI3694@twins.programming.kicks-ass.net> <20131121132041.GS4138@linux.vnet.ibm.com> <20131121172558.GA27927@linux.vnet.ibm.com> <20131121215249.GZ16796@laptop.programming.kicks-ass.net> <20131121221859.GH4138@linux.vnet.ibm.com> <20131122155835.GR3866@twins.programming.kicks-ass.net> <20131122182632.GW4138@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20131122182632.GW4138@linux.vnet.ibm.com> Sender: owner-linux-mm@kvack.org List-ID: To: "Paul E. McKenney" Cc: Will Deacon , Tim Chen , Ingo Molnar , Andrew Morton , Thomas Gleixner , "linux-kernel@vger.kernel.org" , linux-mm , "linux-arch@vger.kernel.org" , Linus Torvalds , Waiman Long , Andrea Arcangeli , Alex Shi , Andi Kleen , Michel Lespinasse , Davidlohr Bueso , Matthew R Wilcox , Dave Hansen , Rik van Riel , Peter Hurley , Raghavendra K T , George Spelvin , "H. Peter Anvin" , Arnd Bergmann , Aswin Chandramouleeswaran , Scott J Norton , "Figo.zhang" On Fri, Nov 22, 2013 at 10:26:32AM -0800, Paul E. McKenney wrote: > The real source of my cognitive pain is that here we have a sequence of > code that has neither atomic instructions or memory-barrier instructions, > but it looks like it still manages to act as a full memory barrier. > Still not quite sure I should trust it... Yes, this is something that puzzles me too. That said, the two rules that: 1) stores aren't re-ordered against other stores 2) reads aren't re-ordered against other reads Do make that: STORE x LOAD x form a fence that neither stores nor loads can pass through from either side; note however that they themselves rely on the data dependency to not reorder against themselves. If you put them the other way around: LOAD x STORE y we seem to get a stronger variant because stores are not re-ordered against older reads. There is however the exception cause for rule 1) above, which includes clflush, non-temporal stores and string ops; the actual mfence instruction doesn't seem to have this exception and would thus be slightly stronger still. Still confusion situation all round. -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org