From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pa0-f51.google.com (mail-pa0-f51.google.com [209.85.220.51]) by kanga.kvack.org (Postfix) with ESMTP id 0793B6B0038 for ; Wed, 20 Nov 2013 12:02:15 -0500 (EST) Received: by mail-pa0-f51.google.com with SMTP id fa1so1349067pad.10 for ; Wed, 20 Nov 2013 09:02:15 -0800 (PST) Received: from psmtp.com ([74.125.245.185]) by mx.google.com with SMTP id sn7si14701568pab.22.2013.11.20.09.02.13 for ; Wed, 20 Nov 2013 09:02:14 -0800 (PST) Date: Wed, 20 Nov 2013 17:00:17 +0000 From: Will Deacon Subject: Re: [PATCH v6 0/5] MCS Lock: MCS lock code cleanup and optimizations Message-ID: <20131120170017.GI19352@mudshark.cambridge.arm.com> References: <1384911446.11046.450.camel@schen9-DESK> <20131120101957.GA19352@mudshark.cambridge.arm.com> <20131120125023.GC4138@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20131120125023.GC4138@linux.vnet.ibm.com> Sender: owner-linux-mm@kvack.org List-ID: To: "Paul E. McKenney" Cc: Tim Chen , Ingo Molnar , Andrew Morton , Thomas Gleixner , "linux-kernel@vger.kernel.org" , linux-mm , "linux-arch@vger.kernel.org" , Linus Torvalds , Waiman Long , Andrea Arcangeli , Alex Shi , Andi Kleen , Michel Lespinasse , Davidlohr Bueso , Matthew R Wilcox , Dave Hansen , Peter Zijlstra , Rik van Riel , Peter Hurley , Raghavendra K T , George Spelvin , "H. Peter Anvin" , Arnd Bergmann , Aswin Chandramouleeswaran , Scott J Norton , "Figo.zhang" On Wed, Nov 20, 2013 at 12:50:23PM +0000, Paul E. McKenney wrote: > On Wed, Nov 20, 2013 at 10:19:57AM +0000, Will Deacon wrote: > > On Wed, Nov 20, 2013 at 01:37:26AM +0000, Tim Chen wrote: > > > Will, do you want to take a crack at adding implementation for ARM > > > with wfe instruction? > > > > Sure, I'll have a go this week. Thanks for keeping that as a consideration! > > > > As an aside: what are you using to test this code, so that I can make sure I > > don't break it? > > +1 to that! In fact, it would be nice to have the test code in-tree, > especially if it can test a wide variety of locks. (/me needs to look > at what test code for locks might already be in tree, for that matter...) Well, in the absence of those tests, I've implemented something that I think will work for ARM and could be easily extended to arm64. Tim: I reverted your final patch and went with Paul's suggestion just to look into the contended case. I'm also not sure about adding asm/mcs_spinlock.h. This stuff might be better in asm/spinlock.h, which already exists and contains both spinlocks and rwlocks. Depends on how much people dislike the Kconfig symbol + conditional #include. Anyway, patches below. I included the ARM bits for reference, but please don't include them in your series! Cheers, Will --->8