From: Markus Trippelsdorf <markus@trippelsdorf.de>
To: Eric Dumazet <eric.dumazet@gmail.com>
Cc: "Alex,Shi" <alex.shi@intel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-mm@kvack.org" <linux-mm@kvack.org>,
Christoph Lameter <cl@linux-foundation.org>,
Pekka Enberg <penberg@kernel.org>, Matt Mackall <mpm@selenic.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
tj@kernel.org
Subject: Re: WARNING: at mm/slub.c:3357, kernel BUG at mm/slub.c:3413
Date: Mon, 21 Nov 2011 16:36:21 +0100 [thread overview]
Message-ID: <20111121153621.GA1678@x4.trippels.de> (raw)
In-Reply-To: <1321884966.10470.2.camel@edumazet-HP-Compaq-6005-Pro-SFF-PC>
On 2011.11.21 at 15:16 +0100, Eric Dumazet wrote:
> Le lundi 21 novembre 2011 a 14:15 +0100, Markus Trippelsdorf a ecrit :
>
> > I've enabled CONFIG_SLUB_DEBUG_ON and this is what happend:
> >
>
> Thanks
>
> Please continue to provide more samples.
>
> There is something wrong somewhere, but where exactly, its hard to say.
New sample. This one points to lib/idr.c:
[drm] Initialized drm 1.1.0 20060810
[drm] radeon defaulting to kernel modesetting.
[drm] radeon kernel modesetting enabled.
radeon 0000:01:05.0: PCI INT A -> GSI 18 (level, low) -> IRQ 18
radeon 0000:01:05.0: setting latency timer to 64
[drm] initializing kernel modesetting (RS780 0x1002:0x9614 0x1043:0x834D).
[drm] register mmio base: 0xFBEE0000
[drm] register mmio size: 65536
ATOM BIOS: 113
radeon 0000:01:05.0: VRAM: 128M 0x00000000C0000000 - 0x00000000C7FFFFFF (128M used)
radeon 0000:01:05.0: GTT: 512M 0x00000000A0000000 - 0x00000000BFFFFFFF
[drm] Detected VRAM RAM=128M, BAR=128M
[drm] RAM width 32bits DDR
[TTM] Zone kernel: Available graphics memory: 4083428 kiB.
[TTM] Zone dma32: Available graphics memory: 2097152 kiB.
[TTM] Initializing pool allocator.
[drm] radeon: 128M of VRAM memory ready
[drm] radeon: 512M of GTT memory ready.
[drm] Supports vblank timestamp caching Rev 1 (10.10.2010).
[drm] Driver supports precise vblank timestamp query.
[drm] radeon: irq initialized.
[drm] GART: num cpu pages 131072, num gpu pages 131072
[drm] Loading RS780 Microcode
[drm] PCIE GART of 512M enabled (table at 0x00000000C0040000).
radeon 0000:01:05.0: WB enabled
[drm] ring test succeeded in 1 usecs
[drm] radeon: ib pool ready.
[drm] ib test succeeded in 0 usecs
=============================================================================
BUG idr_layer_cache: Poison overwritten
-----------------------------------------------------------------------------
INFO: 0xffff880215650800-0xffff880215650803. First byte 0x0 instead of 0x6b
INFO: Slab 0xffffea0008559400 objects=18 used=18 fp=0x (null) flags=0x4000000000004080
INFO: Object 0xffff8802156506d0 @offset=1744 fp=0xffff880215650a38
Bytes b4 ffff8802156506c0: a4 6f fb ff 00 00 00 00 5a 5a 5a 5a 5a 5a 5a 5a .o......ZZZZZZZZ
Object ffff8802156506d0: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff8802156506e0: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff8802156506f0: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650700: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650710: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650720: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650730: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650740: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650750: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650760: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650770: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650780: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650790: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff8802156507a0: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff8802156507b0: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff8802156507c0: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff8802156507d0: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff8802156507e0: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff8802156507f0: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650800: 00 00 00 00 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b ....kkkkkkkkkkkk
Object ffff880215650810: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650820: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650830: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650840: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650850: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650860: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650870: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650880: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff880215650890: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff8802156508a0: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff8802156508b0: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff8802156508c0: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff8802156508d0: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
Object ffff8802156508e0: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b a5 kkkkkkkkkkkkkkk.
Redzone ffff8802156508f0: bb bb bb bb bb bb bb bb ........
Padding ffff880215650a30: 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZ
Pid: 1, comm: swapper Not tainted 3.2.0-rc2-00274-g6fe4c6d #71
Call Trace:
[<ffffffff81101cf8>] ? print_section+0x38/0x40
[<ffffffff811021f3>] print_trailer+0xe3/0x150
[<ffffffff811023f0>] check_bytes_and_report+0xe0/0x100
[<ffffffff811031e6>] check_object+0x1c6/0x240
[<ffffffff812031f0>] ? idr_pre_get+0x60/0x90
[<ffffffff814c5c43>] alloc_debug_processing+0x62/0xe4
[<ffffffff814c64f1>] __slab_alloc.constprop.69+0x1a4/0x1e0
[<ffffffff8129ae77>] ? drm_property_create+0x47/0x110
[<ffffffff812031f0>] ? idr_pre_get+0x60/0x90
[<ffffffff81104db1>] kmem_cache_alloc+0x121/0x150
[<ffffffff812031f0>] ? idr_pre_get+0x60/0x90
[<ffffffff812031f0>] idr_pre_get+0x60/0x90
[<ffffffff8129870a>] drm_mode_object_get+0x6a/0xc0
[<ffffffff8129ae95>] drm_property_create+0x65/0x110
[<ffffffff8129b15d>] drm_mode_config_init+0xfd/0x190
[<ffffffff812e12ad>] radeon_modeset_init+0x1d/0x860
[<ffffffff813211c7>] ? radeon_acpi_init+0x87/0xc0
[<ffffffff812c37b8>] radeon_driver_load_kms+0xf8/0x150
[<ffffffff81295a06>] drm_get_pci_dev+0x186/0x2d0
[<ffffffff814bf1fd>] ? radeon_pci_probe+0x9e/0xb8
[<ffffffff814bf20f>] radeon_pci_probe+0xb0/0xb8
[<ffffffff8121be15>] pci_device_probe+0x75/0xa0
[<ffffffff81324e1a>] ? driver_sysfs_add+0x7a/0xb0
[<ffffffff81325021>] driver_probe_device+0x71/0x190
[<ffffffff813251db>] __driver_attach+0x9b/0xa0
[<ffffffff81325140>] ? driver_probe_device+0x190/0x190
[<ffffffff81323e0d>] bus_for_each_dev+0x4d/0x90
[<ffffffff813252f9>] driver_attach+0x19/0x20
[<ffffffff81324598>] bus_add_driver+0x188/0x250
[<ffffffff81325942>] driver_register+0x72/0x150
[<ffffffff81321de5>] ? device_add+0x75/0x600
[<ffffffff8121bb7d>] __pci_register_driver+0x5d/0xd0
[<ffffffff81295c54>] drm_pci_init+0x104/0x120
[<ffffffff818abefa>] ? ttm_init+0x62/0x62
[<ffffffff818abfe1>] radeon_init+0xe7/0xe9
[<ffffffff81890883>] do_one_initcall+0x7a/0x129
[<ffffffff818909cc>] kernel_init+0x9a/0x114
[<ffffffff814cddb4>] kernel_thread_helper+0x4/0x10
[<ffffffff81890932>] ? do_one_initcall+0x129/0x129
[<ffffffff814cddb0>] ? gs_change+0xb/0xb
FIX idr_layer_cache: Restoring 0xffff880215650800-0xffff880215650803=0x6b
FIX idr_layer_cache: Marking all objects used
[drm] Radeon Display Connectors
[drm] Connector 0:
[drm] VGA
[drm] DDC: 0x7e40 0x7e40 0x7e44 0x7e44 0x7e48 0x7e48 0x7e4c 0x7e4c
[drm] Encoders:
[drm] CRT1: INTERNAL_KLDSCP_DAC1
[drm] Connector 1:
[drm] DVI-D
[drm] HPD3
[drm] DDC: 0x7e50 0x7e50 0x7e54 0x7e54 0x7e58 0x7e58 0x7e5c 0x7e5c
[drm] Encoders:
[drm] DFP3: INTERNAL_KLDSCP_LVTMA
[drm] radeon: power management initialized
[drm] fb mappable at 0xF0142000
[drm] vram apper at 0xF0000000
[drm] size 7299072
[drm] fb depth is 24
[drm] pitch is 6912
fbcon: radeondrmfb (fb0) is primary device
Console: switching to colour frame buffer device 131x105
...
--
Markus
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next prev parent reply other threads:[~2011-11-21 15:36 UTC|newest]
Thread overview: 109+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-18 7:25 Markus Trippelsdorf
2011-11-18 7:55 ` Markus Trippelsdorf
2011-11-18 8:43 ` Alex,Shi
2011-11-18 8:54 ` Markus Trippelsdorf
2011-11-18 8:57 ` Markus Trippelsdorf
2011-11-18 12:02 ` Markus Trippelsdorf
2011-11-21 0:44 ` Alex,Shi
2011-11-21 7:29 ` Markus Trippelsdorf
2011-11-21 8:05 ` Markus Trippelsdorf
2011-11-21 8:24 ` Markus Trippelsdorf
2011-11-21 8:56 ` Eric Dumazet
2011-11-21 9:16 ` Eric Dumazet
2011-11-21 13:15 ` Markus Trippelsdorf
2011-11-21 14:16 ` Eric Dumazet
2011-11-21 14:21 ` Markus Trippelsdorf
2011-11-21 15:36 ` Markus Trippelsdorf [this message]
2011-11-21 15:48 ` Eric Dumazet
2011-11-21 16:10 ` Markus Trippelsdorf
2011-11-21 16:34 ` Markus Trippelsdorf
2011-11-22 8:36 ` Markus Trippelsdorf
2011-12-19 3:21 ` Eric W. Biederman
2011-12-19 9:19 ` Markus Trippelsdorf
2011-12-19 9:06 ` Eric W. Biederman
2011-11-21 16:52 ` Eric Dumazet
2011-11-21 17:15 ` Eric Dumazet
2011-11-21 17:35 ` Markus Trippelsdorf
2011-11-21 18:39 ` Eric Dumazet
2011-11-21 18:52 ` Markus Trippelsdorf
2011-11-21 19:51 ` Markus Trippelsdorf
2011-11-21 20:27 ` Benjamin Herrenschmidt
2011-11-21 21:30 ` Pekka Enberg
2011-11-21 21:43 ` Christoph Lameter
2011-11-22 0:21 ` Christian Kujau
2011-11-22 0:42 ` Christian Kujau
2011-11-22 2:17 ` Benjamin Herrenschmidt
2011-11-22 8:37 ` Christian Kujau
2011-11-22 3:18 ` Christoph Lameter
2011-11-22 7:48 ` Eric Dumazet
2011-11-22 7:51 ` Markus Trippelsdorf
2011-11-22 8:27 ` Eric Dumazet
2011-11-23 7:13 ` Markus Trippelsdorf
2011-11-23 7:20 ` Eric Dumazet
2011-11-22 8:39 ` Christian Kujau
2011-11-22 22:16 ` Benjamin Herrenschmidt
2011-11-22 22:31 ` Eric Dumazet
2011-11-22 22:32 ` Christoph Lameter
2011-11-22 21:58 ` Benjamin Herrenschmidt
2011-11-22 23:12 ` Christian Kujau
2011-11-23 0:18 ` Benjamin Herrenschmidt
2011-11-23 1:22 ` Christian Kujau
2011-11-23 1:43 ` Benjamin Herrenschmidt
2011-11-23 5:51 ` Christian Kujau
2011-11-23 6:59 ` Pekka Enberg
2011-11-23 15:14 ` slub: use irqsafe_cpu_cmpxchg for put_cpu_partial Christoph Lameter
2011-11-23 16:04 ` Eric Dumazet
2011-11-23 18:33 ` Christian Kujau
2011-11-24 6:45 ` Pekka Enberg
2011-11-23 23:15 ` David Rientjes
2011-11-22 8:45 ` WARNING: at mm/slub.c:3357, kernel BUG at mm/slub.c:3413 Markus Trippelsdorf
2011-11-22 9:25 ` Eric Dumazet
2011-11-22 9:27 ` Eric Dumazet
2011-11-22 9:38 ` Eric Dumazet
2011-11-22 9:46 ` Eric Dumazet
2011-11-22 14:46 ` Christoph Lameter
2011-11-22 14:52 ` Eric Dumazet
2011-11-22 15:02 ` Christoph Lameter
2011-11-22 15:07 ` Christoph Lameter
2011-11-22 16:20 ` Christoph Lameter
2011-11-22 16:32 ` Eric Dumazet
2011-11-22 16:36 ` Christoph Lameter
2011-11-22 16:41 ` Christoph Lameter
2011-11-22 16:53 ` slub: Lockout validation scans during freeing of object Christoph Lameter
2011-11-22 17:21 ` Eric Dumazet
2011-11-22 17:40 ` Christoph Lameter
2011-11-22 18:55 ` Markus Trippelsdorf
2011-11-22 19:20 ` Christoph Lameter
2011-11-22 19:32 ` Markus Trippelsdorf
2011-11-22 19:46 ` Christoph Lameter
2011-11-22 17:59 ` Christoph Lameter
2011-11-22 11:21 ` WARNING: at mm/slub.c:3357, kernel BUG at mm/slub.c:3413 Markus Trippelsdorf
2011-11-22 14:50 ` Christoph Lameter
2011-11-22 14:44 ` Christoph Lameter
2011-11-21 15:51 ` Markus Trippelsdorf
2011-11-23 16:03 ` Markus Trippelsdorf
2011-11-23 16:06 ` Christoph Lameter
2011-11-24 8:50 ` Markus Trippelsdorf
2011-12-01 8:44 ` Markus Trippelsdorf
2011-12-01 8:53 ` Pekka Enberg
2011-12-02 19:43 ` Jerome Glisse
2011-12-02 20:06 ` Markus Trippelsdorf
2011-12-02 20:48 ` Markus Trippelsdorf
2011-12-07 14:32 ` Robert Richter
2011-12-07 14:39 ` Markus Trippelsdorf
2011-12-02 23:04 ` Jerome Glisse
2011-12-03 9:28 ` Markus Trippelsdorf
2011-12-03 12:20 ` Dave Airlie
2011-12-03 12:29 ` Markus Trippelsdorf
2011-12-03 19:31 ` Jerome Glisse
2011-12-03 19:32 ` Jerome Glisse
2011-12-04 1:02 ` Markus Trippelsdorf
2011-12-04 17:32 ` Jerome Glisse
2011-12-05 17:10 ` Jerome Glisse
2011-12-05 18:15 ` Markus Trippelsdorf
2011-12-05 18:43 ` Jerome Glisse
2011-12-05 19:11 ` Jerome Glisse
2011-12-05 19:27 ` Markus Trippelsdorf
2011-12-05 20:10 ` Pekka Enberg
2011-12-05 20:20 ` Jerome Glisse
2011-12-05 10:44 ` David Laight
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