Re: [PATCH 8/8] x86_64: Support for new UV apic

[Jack Steiner <steiner@sgi.com>]

> >  Did you test it on non UV_X2APIC box?
> 
> anyway the read_apic_id is totally wrong, even for your UV_X2APIC box.
> because id=apic_read(APIC_ID) will have apic_id at bits [31,24], and
> id |= __get_cpu_var(x2apic_extra_bits) is assuming that is on bits [5,0]
> 
> so you even didn't test in your UV_X2APIC box!
> 

It works fine on UV_X2APIX boxes because the double shift does
not occur. However, support for UV_X2APIC is dependent on
x2apic code that is not yet in the tree. Once the APIC
is switched into x2apic mode, the apicid is located in the LOW
bits of the apicid register, not the HIGH bits.

I have a local x2apic patch that I apply on top of the previous
patches. The local patch is an early copy of a patch that will come
from Intel. However, the other 2 apic modes work fine with the
patches that were submitted.

--- jack

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